The PolySi etch step is a critical integration process that transfers the critical dimension (CD) from the lithography pattern into the polycrystalline silicon film P1. This step directly defines the gate electrode, which subsequently controls the formation of the underlying inversion layer in the MOSFET channel T1. Placed immediately after the photoresist patterning, this step must faithfully replicate the resist geometry without damaging the ultra-thin gate oxide beneath the poly-Si layer P1.