The SiO Hard Mask Deposition step serves as a critical pattern transfer layer within the Shallow Trench Isolation (STI) module for the 40nm BSI CMOS Image Sensor P1.Positioned immediately after the SiN Hard Mask Deposition, this silicon oxide layer completes a composite hard mask stack required for high-fidelity trench definition P1.As device dimensions shrink to the nanoscale, photoresist alone lacks the physical etch resistance necessary to mask deep or high-aspect-ratio trench etching, necess