In a 40nm BSI CMOS Image Sensor, the lower vertical grid acts as a deep optical and electrical isolation wall to suppress crosstalk between adjacent photodiode pixels (Engineering Practice).This Lower Vertical Grid Deposition step fills the high-aspect-ratio trenches that were patterned and lined with a barrier layer in the preceding steps (Engineering Practice).It is distinct from the upper LS/Aperture Grid Deposition because the lower grid extends much deeper into the pixel isolation structure