The "Lower Vertical Grid Trench - Photo" step defines the precise geometric boundaries for optical and electrical isolation structures between adjacent pixels in a 40nm Backside Illuminated (BSI) CMOS Image Sensor (Engineering Practice).Following the Pre Litho Cleaning and Optical Pad 1 Deposition steps, this photolithography process creates the temporary polymer masking template required for the subsequent Optical Pad 1 Etch and Oxide Grid Seal Layer Etch steps P3.Unlike Shallow Trench Isolatio