In 40nm BSI CMOS image sensors, 3D heterogeneous integration relies heavily on Direct Bond Interconnect (DBI) technology to join the sensor array with the logic die P2.The ILD 6-5 Etch step is a critical BEOL dry etching process designed to define the dielectric trenches for the subsequent Metal 8 DBI pads A2.Positioned immediately after the Wafer Bonding Layer (WBL) etch, this step selectively transfers the photolithographically defined trench pattern deep into the bulk ILD 6 dielectric stack A