The Pre-Metal Dielectric (PMD) 1 deposition is a critical Middle-of-Line (MOL) process step designed to electrically isolate the Front-End-of-Line (FEOL) transistor structures from the forthcoming first level of metal interconnects A1.Positioned immediately after the Contact Etch Stop Layer (CESL) depositions, PMD 1 serves as the primary gap-fill layer covering the high-aspect-ratio spaces between tightly pitched gate electrodes P3.In advanced nodes like 40nm, the continuous scaling of devices d