The Post CMP Cleaning step for the Mid Vertical Grid is critical in the 40nm Backside Illuminated (BSI) CMOS Image Sensor process flow A2.Following the Chemical Mechanical Polishing (CMP) of the tungsten (W) grid, the wafer surface is heavily contaminated with residual slurry abrasives, metallic fragments, and organic chemical byproducts P2.Unlike the Shallow Trench Isolation (STI) Post CMP Clean which primarily targets oxide and nitride residues, this specific cleaning step must aggressively ad