40nm BSI CMOS Image SensorPreview

of a 40nm BSI CIS (Engineering Practice). The Upper Vertical Grid typically consists of a Tungsten core and a TiN barrier, which will be patterned and etched in the subsequent steps (Engineering Practice). Unlike earlier Pre Litho Cleaning steps (such as steps #7 or #13) that prepare bare silicon or front-end dielectrics for patterning, this step is uniquely tailored to prepare a freshly deposited metallic stack for fine-pitch photolithography [P1]. The primary objective is to remove organic or inorganic contaminants that could obstruct effective contact between the photoresist and the substrate, ensuring high pattern fidelity [P1, P4]. The pre-lithography cleaning process fundamentally relies on chemical dissolution and mechanical removal of surface contaminants [A1]. Cleaning solutions containing a strong base, such as ammonium hydroxide, and hydrogen peroxide are frequently used to oxidize residues and dislodge particulate matter through slight surface etching [A1]. However, because the exposed surface in this module is a metallic grid layer, the oxidation potential of the chemistry must be carefully constrained to prevent isotropic etching or galvanic corrosion of the W/TiN films [P2]. The cleaning process also modifies the surface chemistry and micro-topographical structure, which directly increases the polar and dispersive components of the surface free energy [P4]. Higher surface free energy enables stronger interfacial bonding and better wetting for the subsequent photoresist or bottom anti-reflective coating (BARC) application [P4]. Furthermore, the wafer is typically heated to drive off any residual moisture, which prevents aqueous developer from penetrating the resist-substrate interface later [P1]. The selection of cleaning chemistry requires a strict balance between particle removal efficiency and substrate compatibility (Engineering Practice). While standard wet cleans effectively remove particles, their concentrations, temperatures, and process times dictate the extent of chemical reactions on the sensitive metal surface [A1]. If the chemical treatment excessively roughens the underlying metal, it can induce reflectivity variations that degrade the optical-interference suppression effectiveness of the BARC during the lithography exposure [P2]. Therefore, parameter interactions are carefully tuned: increasing chemical concentration improves organic removal but simultaneously elevates the risk of unintended transition-metal etching [P1]. At the 40nm node for BSI image sensors, the Upper Vertical Grid must be patterned with precise critical dimensions to serve as a physical and optical barrier suppressing crosstalk between adjacent pixels [A3]. Because optical resolution in modern photolithography is tightly constrained by diffraction at these nanometer scales, the pre-litho surface must be flawlessly clean to ensure highly uniform resist spin-coating and precise depth of focus [P1]. Consequently, this wet clean must achieve near-zero defectivity without consuming or roughening the meticulously deposited metallic barrier layers prior to the critical W and TiN dry etch steps [P2].