Thermal oxidation converts surface silicon into a high-quality oxide layer, maintaining an ideal energy band bending and preventing unwanted surface accumulation or depletion under operational biases .
The "Ox growth" step within the WELL module serves primarily as a protective screen oxide prior
to the subsequent N-Well photolithography and ion implantation steps . Following the STI SiN strip and wet deglaze, the silicon surface is left exposed and requires passivation to prevent the degradation of the surface potential . Growing a high-quality thermal silicon dioxide layer protects the crystalline silicon from organic photoresist contamination during the upcoming Pre-Litho Cleaning and Photo operations . Furthermore, similar to how small oxide layers are used to buffer and shape junction profiles during source/drain implants, this oxide acts as an essential screen during high-energy N-Well implantation . This screening effect randomizes the trajectory of incoming dopants, mitigating ion channeling and ensuring a well-controlled, predictable dopant profile . The physical growth of this oxide relies on the thermal oxidation of the silicon substrate at elevated temperatures . Oxidizing species, such as oxygen or water vapor, diffuse through the continuously growing oxide layer to react directly with the silicon lattice at the Si-SiO2 interface . The kinetics of this chemical reaction are heavily influenced by the crystal orientation of the exposed silicon, which dictates the areal density of available silicon bonds and consequently the local oxidation rate . Because the reaction inherently consumes substrate silicon, the growth process effectively converts the topmost layers of the lattice into oxide, thereby consuming and neutralizing microscopic residual damage left behind by prior etching steps . Thermal oxidation is selected over chemical vapor deposition (CVD) for this step because thermally grown oxides exhibit a remarkably pristine interface, typically featuring only about $10^{10} \text{ cm}^{-2}$ of positive interface charge . This nearly charge-free interface is critical for maintaining ideal energy band bending and preventing unwanted surface accumulation or depletion under operational biases . The process parameters, particularly oxidation temperature and ambient gas mixture, must be carefully balanced to optimize oxide integrity and minimize long-term leakage currents . While higher temperatures facilitate better oxide density and help relieve mechanical stress at the active area edges to prevent edge dislocations , they simultaneously consume a higher thermal budget (Engineering Practice). An excessive thermal budget at this stage risks unwanted diffusion of the previously implanted Blanket B Well dopants, which could alter the deep well profile and compromise lateral isolation (Engineering Practice). For a 40nm BSI CMOS Image Sensor, controlling the electric field and depletion regions within the deep wells is mandatory to minimize subthreshold leakage and static power consumption . The thickness of this screen oxide must be precisely targeted; if it is too thin, it cannot prevent tunneling leakage or effectively scatter implanted ions, but if too thick, it requires higher implant energies that cause excessive lattice damage . Proper oxide growth ensures predictable flat-band voltages and minimizes the generation of surface states that could otherwise shift threshold voltages and cause reliability concerns over the device's lifetime .
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