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Pixel Array P-Well Implant Mask Lithography

P-Well Ion Implantation
56Pixel Array P-Well Implant Mask Lithography57P-Well Ion Implantation58Ashing & Strip/Clean59Periphery P-Well Implant Mask Lithography60P-Well Ion Implantation61Ashing & Strip/Clean62Periphery N-Well Contact Implant Mask Lithography63N-Well Contact Ion Implantation64Ashing & Strip/Clean

Process Cross-Section

WELL · WL6 · Pixel Array P-Well Photo (Mask Open)screen ox (SiO2, thermal)SiO2 liner (SACVD)SiO2 (SACVD bulk fill)p+ surface passivation (10B+)Liner SiO2 (RTP thermal)PD N-well (31P+)SiNN-well (periphery, 31P+)SiP-well (implanted region)

Step highlight

The photoresist is patterned to block ion implantation in protected areas while allowing dopants to enter exposed silicon regions, forming a defined concentration profile .

In depth

The Pixel Array P-Well IIP - Photo step is a critical photolithography operation designed to define the spatial boundaries f

or the subsequent P-well ion implantation within the active image sensor array . Positioned after the photocathode formation and before the well implantation, this step exposes specific regions where P-type dopants will be introduced to form the body of pixel transistors and the isolation zones between adjacent photodiodes . Unlike the periphery P-well lithography which is optimized for standard logic CMOS threshold voltage control, the pixel array P-well is specifically tailored to maximize the source-follower conversion gain and suppress lateral charge diffusion . Furthermore, the pixel P-well helps establish an electrostatic shielding layer between the P-type epitaxial layer and transistor N-wells, ensuring that photo-generated minority carriers are directed toward the photodiode rather than being lost to parasitic collection nodes . The physical mechanism of this step relies on the precise exposure and development of a photoresist layer to act as an ion implantation mask . Following the Rayleigh lithography resolution principle, where minimum resolvable feature size depends on wavelength and numerical aperture, the optical system transfers the photomask pattern into the resist to define the exact locations of the well openings . Once developed, the patterned resist blocks the high-energy dopant ions in protected areas, while allowing them to enter the silicon in the exposed windows to form a defined concentration profile, typically modeled as a Gaussian distribution . By carefully controlling these spatial dimensions, the resulting P-well modifies the local band structure and potential barriers, physically constraining electron movement to the nearly field-free epitaxial layer and preventing charge leakage . This electrostatic confinement is fundamentally governed by the semiconductor junction physics and the periodic potential of the crystal . The selection of photoresist materials and coating methods is strictly driven by the stopping power required for the subsequent deep ion implants . Because pixel P-wells often utilize multiple high-energy implantations to create a deep or graded doping profile, the resist must be sufficiently thick and possess high physical density to absorb the kinetic energy of the incoming ions without structural failure . If the resist is compromised, undesired dopants will penetrate into the N-type photocathode regions, altering the p-n junction characteristics and degrading charge accumulation behaviors . Additionally, the resist material must maintain high thermal stability to withstand the localized heating generated during high-dose ion bombardment . In a nanoscale Back-Illuminated (BSI) CMOS Image Sensor architecture, precise control over the pixel P-well is essential to balance speed, power, and noise . As pixel dimensions scale down, the physical proximity of the photodiode to the pixel transistors increases the risk of optical and electrical crosstalk . Therefore, the lithographic alignment and critical dimension control during this step directly dictate the electrostatic boundaries that isolate the shared floating diffusion nodes from the photodiode storage areas . Any deviation in the P-well boundary can exponentially increase subthreshold leakage current in the pixel transistors, governed by the thermodynamic limits of the subthreshold swing .

Risks & Challenges

  • [High] Overlay Misalignment: If the photoresist pattern is misaligned relative to the previously formed photocathode, the subsequent P-well implant will shift, altering the photodiode junction geometry and increasing lateral charge diffusion .
  • [Medium] Inadequate Resist Stopping Power: If the applied photoresist is too thin or degrades during the bake process, high-energy implanted ions will penetrate the protective mask, creating unintentional P-type doping in the N-type photocathode and reducing the full-well capacity .
  • [Medium] Photoresist Scumming: Incomplete chemical development leaves residual resist in the targeted open areas, which absorbs a fraction of the implant dose and results in a shallower P-well . This reduces the electrostatic shielding effectiveness, allowing photo-generated electrons to leak into adjacent PMOS N-wells .
  • [Low] Defocus-Induced CD Variation: Variations in focal depth during exposure alter the critical dimensions of the P-well openings according to optical diffraction limits . This variation modulates the effective pixel transistor body doping, leading to non-uniform source-follower gain across the sensor array .

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Related steps

  • Ox growth
  • Pre Litho Cleaning
  • Periphery N-Well Implant Mask Lithography
  • N-Well Ion Implantation
  • Ashing & Strip/Clean
  • P-Well Ion Implantation