40nm BSI CMOS Image SensorPreview

the image sensor array [P4]. During this implantation, the photoresist acts as a protective mask, absorbing the high-energy ions and transforming the resist surface into a High-Dose Ion-implanted Photoresist (HDI-PR) with a highly cross-linked, hardened crust [P1]. This Ashing & Strip/Clean step is strictly required to completely eradicate this hardened polymeric layer and any metallic or organic contaminants before the subsequent Periphery P-Well photolithography step [P1]. Failure to remove this residue would result in catastrophic overlay errors and cross-contamination during the subsequent logic well patterning [P2]. What makes this specific step distinct from routine photoresist stripping earlier in the flow is the severe physical degradation of the resist crust induced by the pixel P-well implant, necessitating a highly specialized combination of radical-based dry ashing and activated wet chemical stripping [P1]. The stripping of HDI-PR relies on a dual-stage dry-wet mechanism to break down the carbonized crust and dissolve the underlying unreacted polymer [P1]. Initially, a plasma process utilizes high-energy radicals, such as atomic oxygen (O) and hydroxyl (OH), to break the C-C and C-H bonds of the organic photoresist framework [P2]. These reactive species interact with the carbon network, oxidizing it into volatile byproducts like CO rather than fully converting it to CO2, which minimizes thermal degradation and suppresses substrate oxidation [P2]. Following the crust degradation, a wet chemical stripper is applied to dissolve the remaining bulk photoresist [P1]. The efficiency of this wet chemical step can be significantly amplified by plasma liquid-vapor activation, where energetic radicals locally lower the apparent activation energy of the stripping reactions and promote polymer backbone scission [P1]. This combined kinetic and chemical approach ensures that the hardened layer's elastic modulus and surface hardness are rapidly reduced, allowing complete dissolution without requiring excessive mechanical force or extended high-temperature exposure [P1]. Selecting a radical-driven, low-ion-energy ashing chemistry is critical for modern CMOS image sensors because energetic ion bombardment could induce severe physical damage or generate trap states in the underlying silicon [P2]. Traps in the pixel array region are particularly detrimental as they act as generation-recombination centers, directly increasing dark current and degrading the sensor's wide-spectrum sensitivity [P4]. To mitigate these risks, downstream or water-vapor based plasma is often favored over traditional high-bias O2 plasma, as it supplies abundant reactive radicals while confining energetic ions away from the wafer surface [P2]. Furthermore, standard wet clean sequences following the ash, such as the RCA standard clean (SC1), must be carefully controlled; prolonged SC1 exposure is known to etch silicon and can cause unintended dopant loss in shallow implanted regions by oxidizing and dissolving the doped silicon surface [P3]. Thus, the parameter interplay involves balancing the plasma activation power to maximize reactive species generation against the risk of over-ashing the underlying semiconductor [P1]. In the 40nm BSI CMOS Image Sensor architecture, precise control over dopant profiles and interface states is paramount for maximizing conversion gain and full-well capacity [P4]. Because the pixel structure relies on carefully engineered electrostatic shielding layers and steep p-type doping profiles, any silicon recess or surface roughening during the strip process directly alters the localized electric field [P4]. Therefore, the Ashing and Strip/Clean methodology at this node strictly limits the use of aggressive physical sputtering and prolonged alkaline wet cleans (Engineering Practice). Instead, the process relies on chemically tuned, high-selectivity radical stripping to preserve the precise junction depths established during the preceding well implant [P2].