STI CMP - 40nm BSI CMOS Image Sensor 40nm

Ceria abrasive particles chemically interact with silicon dioxide to soften its surface and enable efficient mechanical removal during STI CMP .

The Shallow Trench Isolation (STI) Chemical Mechanical Planarization (CMP) step is a critical planarization process situated immediately after the Pre-C

MP Oxide Deposition and prior to the STI CMP Post Cleaning module . The primary objective of this step is to completely remove the overburden silicon dioxide while utilizing the underlying silicon nitride (Si3N4) film as a rigid polish stop layer . This process physically defines the active transistor boundaries by isolating them with dielectric-filled trenches, which eliminates the bird's beak effect associated with older localized oxidation of silicon (LOCOS) technologies . The planarized surface generated here is an absolute prerequisite for subsequent high-resolution photolithography and gate stack formation, as modern depth-of-focus margins cannot tolerate severe topographical variations . Following this step, post-CMP cleaning is required to remove abrasive residues and organic inhibitors before the final densification anneal prepares the structure for the nitride wet deglaze . The fundamental mechanism of CMP relies on Preston's equation, which dictates that the material removal rate is directly proportional to the applied downward pressure and the relative velocity between the wafer and the polishing pad . However, modern STI CMP operates through a tightly coupled mechanism of chemical softening and mechanical abrasion . Ceria (CeO2) abrasive particles are typically employed because their surface oxygen vacancies and variable valence states impart a unique chemical affinity toward SiO2 . During polishing, ceria forms strong, reversible Ce-O-Si bonds with the oxide, significantly softening the surface and facilitating rapid mechanical removal . Conversely, to protect the active area, chemical additives such as nitrogen-containing aromatic heterocyclic compounds and polyhydroxyl molecules are introduced into the slurry . These additives preferentially adsorb onto the silicon nitride surface via hydrogen bonding, forming a dense passivation layer that severely retards both chemical reactivity and mechanical shear, thereby enabling tunable, highly decoupled oxide-to-nitride removal rates . The selection of ceria-based high-selectivity slurries over traditional silica-based slurries is driven by the necessity to expand the over-polish window and minimize within-die (WID) variations in field oxide erosion . The pH of the slurry serves as a master control parameter, dictating the zeta potential of the abrasives, the hydroxylation state of the film surfaces, and the specific adsorption behavior of the protective inhibitors . Furthermore, to mitigate pattern dependence—where dense and isolated trench arrays polish at different rates—microstructure (MS) polishing pads featuring engineered, uniform micro-channels are utilized . These microstructured pads stabilize the interfacial pressure distribution and optimize fluid dynamics for slurry renewal, effectively suppressing load concentration and localized corner rounding . To ensure process stability, real-time end point detection (EPD) is implemented by monitoring the platen motor current (MC); as the polishing interface transitions from the highly reactive oxide to the chemically inert, lubricated nitride, a detectable drop in the friction coefficient alerts the system to terminate the polish . For a nanoscale Backside Illumination (BSI) CMOS Image Sensor, the STI CMP step demands exceptionally stringent control over micro-scratching and defectivity, as any physical damage to the active silicon interface directly translates to dark current leakage in the photodiodes . The scaling of trench dimensions at the 40nm node exacerbates the risk of nanoscale dishing within the narrow isolation spaces . Consequently, the interplay between the ceria particle size distribution, the dynamic adsorption kinetics of the organic inhibitors, and the micro-contact mechanics of the pad must be exquisitely balanced . This synergistic control ensures global planarization across the dense pixel array while strictly preserving the integrity of the ultra-thin nitride stop layer required for advanced image sensor nodes .

[High] Micro-Scratching: Abrasive particle agglomeration in the high-selectivity ceria slurry can act as large physical asperities during mechanical shear . These agglomerates induce deep micro-scratches that penetrate the nitride stop layer and damage the underlying active silicon, significantly degrading gate oxide integrity and inducing severe leakage currents .
[High] Field Oxide Dishing and Erosion: Prolonged over-polishing or insufficient passivation by slurry additives leads to the continuous, localized mechanical removal of the softer oxide within the trenches compared to the rigid nitride-covered active areas . This dishing compromises the physical thickness of the isolation dielectric, resulting in poor electrical isolation between adjacent active components .
[Medium] End Point Detection (EPD) Masking: Frequent pad conditioning and the presence of complex layout topologies (such as reverse moat structures) introduce high levels of mechanical friction and signal noise . This noise can effectively mask the critical step-change in motor current required for EPD, leading to unintentional over-polishing and critical thinning of the protective nitride layer .
[Medium] Incomplete Oxide Clearing (Under-polish): Variations in local slurry flow or non-uniform pressure distribution by the polishing pad can leave residual silicon dioxide islands over the nitride film . If the oxide overburden is not fully cleared, it physically blocks the subsequent wet etch chemistry from removing the nitride stop layer, causing fatal structural defects in the device array .
[Low] Pattern-Dependent Corner Rounding: In localized regions with rapidly changing pattern densities or large pitch variations, conventional or degraded polishing pads may cause localized stress concentration at the edges of the active areas . This stress concentration preferentially accelerates the removal rate at the STI corners, leading to geometric rounding that degrades the threshold voltage uniformity of the resulting transistors .

Ceria abrasive particles chemically interact with silicon dioxide to soften its surface and enable efficient mechanical removal during STI CMP .

The Shallow Trench Isolation (STI) Chemical Mechanical Planarization (CMP) step is a critical planarization process situated immediately after the Pre-C

[High] Micro-Scratching: Abrasive particle agglomeration in the high-selectivity ceria slurry can act as large physical asperities during mechanical shear . These agglomerates induce deep micro-scratches that penetrate the nitride stop layer and damage the underlying active silicon, significantly degrading gate oxide integrity and inducing severe leakage currents .
[High] Field Oxide Dishing and Erosion: Prolonged over-polishing or insufficient passivation by slurry additives leads to the continuous, localized mechanical removal of the softer oxide within the trenches compared to the rigid nitride-covered active areas . This dishing compromises the physical thickness of the isolation dielectric, resulting in poor electrical isolation between adjacent active components .
[Medium] End Point Detection (EPD) Masking: Frequent pad conditioning and the presence of complex layout topologies (such as reverse moat structures) introduce high levels of mechanical friction and signal noise . This noise can effectively mask the critical step-change in motor current required for EPD, leading to unintentional over-polishing and critical thinning of the protective nitride layer .
[Medium] Incomplete Oxide Clearing (Under-polish): Variations in local slurry flow or non-uniform pressure distribution by the polishing pad can leave residual silicon dioxide islands over the nitride film . If the oxide overburden is not fully cleared, it physically blocks the subsequent wet etch chemistry from removing the nitride stop layer, causing fatal structural defects in the device array .
[Low] Pattern-Dependent Corner Rounding: In localized regions with rapidly changing pattern densities or large pitch variations, conventional or degraded polishing pads may cause localized stress concentration at the edges of the active areas . This stress concentration preferentially accelerates the removal rate at the STI corners, leading to geometric rounding that degrades the threshold voltage uniformity of the resulting transistors .

40nm BSI CMOS Image SensorPreview

Process Cross-Section

Step highlight

In depth

Risks & Challenges

40nm BSI CMOS Image SensorPreview

Process Cross-Section

Step highlight

In depth

Risks & Challenges