The Shallow Trench Isolation (STI) module provides critical electrical isolation between active device regions, preventing parasitic crosstalk and leakage currents in advanced CMOS architectures A2.Immediately following the STI Chemical Mechanical Planarization (CMP) step, the wafer surface is covered with abrasive residues, pad debris, and organic passivation layers P1.This STI CMP Post Cleaning step is specifically designed to completely remove these complex residues before the subsequent STI