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Pre-CMP Oxide Deposition

STI CMP
25SiN Hard Mask Deposition26SiO Hard Mask Deposition27Pre Litho Cleaning28Shallow Trench Isolation - Photo29Oxide Etch30Nitride Etch31Si Etch32Ashing & Strip/Clean33Trench Sidewall Passivation34STI Liner Oxidation35STI Fill Conformal CVD Liner36STI Fill Liner Etchback37Oxidation Preaclean38STI Fill Conformal CVD Oxide39STI Fill Post Clean40STI Conformal CVD Anneal41Pre-CMP Oxide Deposition42STI CMP43STI CMP Post Cleaning44STI Final Densification Anneal45Wet Deglaze Etch46SiN Strip47Blanket B Well Implant

Process Cross-Section

STI · S17 · Pre-CMP Oxide Deposition (Overfill)SiO2 (PECVD TEOS)SiO2 (SACVD bulk fill)SiO2SiNSiO2 liner (SACVD)p+ surface passivation (10B+)Liner SiO2 (RTP thermal)Si

Step highlight

A denser film exhibits a more predictable and uniform removal rate during the chemically assisted mechanical removal process, ensuring high selectivity against the silicon nitride stop layer when using ceria-based slurries .

In depth

The Pre-CMP Oxide Deposition step follows the initial conformal shallow

trench isolation (STI) fill and its subsequent anneal . While the preceding conformal layer protects the trench interfaces and ensures high-quality dielectric contact, it leaves non-planar topography and potential central seams within the trench . The "Pre-CMP Oxide Deposition" applies a bulk dielectric layer, often referred to as the overburden, which is essential to provide sufficient material thickness for the subsequent chemical mechanical planarization (CMP) step . This ensures that the polishing pad completely planarizes the surface across areas with varying pattern densities before reaching the underlying silicon nitride stop layer . Unlike an oxide hard mask used for pattern transfer or a grid seal layer utilized for back-end-of-line optical isolation, this bulk oxide is explicitly designed as a sacrificial structural material to accommodate CMP planarization tolerances and load distributions . The deposition process typically employs plasma-enhanced techniques to rapidly build up the oxide film over the existing topography . The incoming plasma precursors react at the wafer surface to form a silicon dioxide network, which must exhibit adequate mechanical integrity to withstand the intense shear stresses of the upcoming CMP process . If the deposited oxide is too porous or structurally weak, the synergistic "chemical softening + mechanical shear" mechanism of the CMP process will cause uncontrolled material removal and localized defects . Furthermore, the intrinsic stress of the deposited oxide must be carefully managed to avoid stress mismatches with the underlying silicon substrate and trench walls, which could otherwise induce deleterious crystal defects . The selection of the deposition method balances bulk gap-fill capability with deposition rate and overall film density . The process parameters, such as precursor gas flow ratios and plasma power, directly interact to govern the final film density and surface topography (Engineering Practice). A denser film exhibits a more predictable and uniform removal rate during the chemically assisted mechanical removal process, ensuring high selectivity against the silicon nitride stop layer when using ceria-based slurries . Furthermore, variations in the deposited thickness across different pattern densities fundamentally dictate the localized planarization efficiency and the required overpolish time in the subsequent step . At the 40nm node, the aspect ratios of STI trenches necessitate multi-stage filling strategies to mitigate void formation . The reliance on a primary conformal fill followed by a dedicated pre-CMP bulk oxide deposition allows engineers to decouple the requirements of interface quality from those of planarization capability . As feature sizes shrink, any abrasive agglomerates or large particles acting on an unevenly deposited oxide can generate chatter-type continuous scratches via plowing mechanisms . Thus, achieving a highly uniform pre-CMP oxide topography is critical to minimizing localized high-stress mechanical contact events during planarization .

Risks & Challenges

  • [High] CMP Scratching: If the deposited oxide is structurally deficient or presents extreme surface topography, it exacerbates localized high-stress mechanical contact events during CMP . Hard or size-anomalous abrasive agglomerates in the slurry interact with these topographical peaks, inducing chatter-type continuous scratches via plowing and cutting mechanisms .
  • [High] Dishing and Incomplete Planarization: Severe across-wafer thickness non-uniformity in the deposited oxide interacts poorly with pattern density variations during CMP . This leads to localized over-polishing where the oxide is too thin, resulting in dishing of the field oxide within the trenches, or under-polishing where the oxide is too thick, preventing complete removal over the nitride stop layer .
  • [Medium] Stress-Induced Defect Generation: Deposition parameters that yield excessively high intrinsic compressive or tensile stress in the bulk oxide can cause mechanical mismatch with the underlying conformal fill and substrate . During subsequent thermal treatments or under CMP mechanical loading, this thermo-mechanical stress concentration can induce interfacial cracks or crystal defects in the adjacent active silicon regions .
  • [Medium] Sub-surface Void Exposure: If the pre-CMP oxide deposition fails to completely bridge the topography left by the conformal fill, micro-voids may be incorporated into the bulk film . As the CMP process selectively shears off the overburden , these subsurface voids can be exposed, creating traps for slurry residue and resulting in severe electrical leakage pathways (Engineering Practice).

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Related steps

  • SiN Hard Mask Deposition
  • SiO Hard Mask Deposition
  • Pre Litho Cleaning
  • Shallow Trench Isolation - Photo
  • Oxide Etch
  • Nitride Etch