The As-doped PolySi deposition step forms the foundational gate electrode material for both the pixel array and peripheral logic transistors in the 40nm CMOS Image Sensor flow T1.Positioned immediately after the Thick Gate Oxide Growth and Nitride Hard Mask Removal steps, this deposition provides the highly conductive layer that will physically control the transistor channel T2.This step directly prepares the gate stack for the subsequent PolySi Anneal, which is required to fully crystallize the