Wet etching removes the nitride hard mask selectively to expose the underlying silicon without damaging the thin gate oxide or altering surface roughness .
In the dual-gate oxide (DGOX) module for 40nm CMOS image sensors, the silicon nitride hard mask protects specific regions during the localize
d growth of the thick gate oxide . Once the thick thermal oxide has been grown to accommodate high-voltage operating requirements, the protective nitride hard mask must be entirely removed to expose the underlying regions for subsequent gate stack formation . This step is positioned immediately before the As-doped PolySi deposition to ensure that the gate electrode interfaces directly with the pristine gate dielectrics without intervening sacrificial layers . Unlike CMP-based nitride removal which is driven by mechanical planarization, or oxide hard mask removal, this specific wet etching step relies entirely on chemical selectivity to strip the nitride without degrading the critically thin gate oxides or modifying the silicon surface roughness . The removal of the silicon nitride hard mask is executed using a high-temperature phosphoric acid (H3PO4) wet etching process, which exploits thermodynamic differences in dissolution between Si3N4 and SiO2 . The fundamental chemical mechanism involves the hydrolysis of silicon nitride in the hot acid to produce soluble orthosilicic acid (Si(OH)4) . This process is governed by a reversible dehydration reaction where Si(OH)4 can convert into solid silicon dioxide (SiO2) and water . According to Le Chatelier's principle, maintaining a specific concentration of silicic acid in the etchant shifts the reaction equilibrium to suppress the dissolution of SiO2, thereby creating a highly effective etch stop layer . This thermodynamic balance ensures that the underlying and adjacent gate oxides are preserved while the nitride is completely volatilized or dissolved . Hot phosphoric acid is explicitly selected for this step because of its intrinsically high etch selectivity for Si3N4 over SiO2, a property heavily utilized in semiconductor manufacturing . While dry etching utilizing fluorocarbon plasmas can achieve some selectivity through polymer passivation dynamics , wet etching is preferred here to completely eliminate the risk of plasma-induced damage or ion bombardment on the sensitive gate oxide structures . In advanced nodes, this process is frequently transitioned to single-wafer processors to enhance particle control and reduce cross-contamination . However, process parameters such as spin speed, puddle time, and chemical temperature must be tightly coupled to manage heat and mass transfer . Temperature is the most critical control parameter; increasing the etchant temperature accelerates the nitride reaction kinetics but inversely reduces the stability of Si(OH)4, increasing the risk of unwanted SiO2 precipitation and subsequent selectivity loss . For a 40nm BSI CMOS image sensor, preserving the subthreshold characteristics and minimizing leakage currents are paramount for device performance . Any oxide loss during the nitride hard mask removal directly alters the effective oxide thickness, which modulates the threshold voltage and alters the inversion layer charge density . Consequently, equipment modifications such as upper-wafer heating plates are sometimes implemented in single-wafer tools to prevent localized cooling during the acid spray, ensuring uniform reaction equilibrium across the wafer and preventing microscopic variations in gate dielectric thickness .
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