Following the PolySi - Etch process, the wafer is covered with a heavily cross-linked photoresist crust and fluorocarbon or halogen-based sidewall passivation polymers A1.This Ashing & Strip/Clean step is strictly required to completely remove these carbonaceous and polymeric layers before the subsequent NMOS LDD lithography and implantation A2.What makes this specific step unique compared to downstream back-end cleans is its immediate physical proximity to the critical gate edges and the ultra-