40nm BSI CMOS Image SensorPreview

ackaging connections [A2]. This specific "Ta-Barrier etch" occurs immediately after the bulk Al Metal Etch, indicating it is the bottom barrier removal step in a stacked metal pad structure [P2]. Removing this bottom barrier is critical to establish a direct, low-resistance ohmic contact to the underlying M7 copper layer [T1]. Minimizing the specific contact resistance at this interface is essential for high-current or high-frequency signal extraction in the sensor [T1]. Unlike the initial top barrier etch (step #259) which breaches the anti-reflective capping layer before bulk Al etching, this step must selectively clear the bottom barrier without heavily damaging or eroding the underlying interconnects [P2]. The etching of Ta-based barriers utilizes Reactive Ion Etching (RIE) driven by halogen gas chemistries [A1]. In the plasma, energetic electrons ionize the gas, generating reactive radicals and positive ions [P1]. The process relies on a synergistic physicochemical mechanism: physical ion bombardment breaks surface Ta-N or Ta bonds, while chemical radicals react with the exposed tantalum to form volatile halides [A1]. High-energy ions accelerated across the plasma sheath provide the necessary activation energy to drive these anisotropic surface reactions [P1]. The balance between physical sputtering and chemical etching must be carefully controlled to prevent excessive sidewall damage or physical trenching into the underlying metal layer [P1]. RIE is chosen over wet etching because submicron integration requires high anisotropy and strict critical dimension control [P4]. Halogen plasmas are highly effective for Ta removal, but they pose a severe risk of diffusing into the underlying metal and causing corrosion or hillock formation [A1]. Therefore, process parameters such as RF power and gas mixture ratios are tuned to maximize the chemical etch rate of Ta while maintaining high selectivity to the underlying exposed structures [P4]. Lowering the chamber pressure can increase the mean free path of ions, leading to highly directional ballistic transport that minimizes lateral scattering [P4]. However, excessive ion energy must be avoided, as it can induce lattice defects and drive halogen species deeper into the exposed metal interfaces [P1]. In a 40nm BSI CIS flow, the bond pad structures must accommodate stringent packaging constraints and minimize thermo-mechanical stress [P3]. Residual stress in the Ta barrier can be very high and approaches the material's yield strength [P3]. If the etch process leaves sharp morphological artifacts or uneven barrier thicknesses, subsequent thermal cycling during packaging can cause localized high stress concentrations and film cracking [P3]. Thus, the etch must yield a smooth, completely cleared interface to ensure reliable wire bonding and prevent leakage currents induced by thermo-mechanical failure [P3].