Si Etch (BONDPAD) - 40nm | SemiFlows

40nm BSI CMOS Image SensorFree after sign-in

Bond Pad Opening 3 - Photo

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Si Etch

382Bond Pad Opening 1 - Photo 383Upper OCL Coating Etch 384Ashing & Strip/Clean 385Bond Pad Opening 2 - Photo 386Upper Grid Seal Layer Etch 387Optical Pad 3 Etch 388Lower OCL Coating Etch 389Lower OCL Etch 390Optical Pad 2 Etch 391Optical Pad 1 Etch 392Oxide Grid Seal Layer Etch 393BPMD Etch 394HKD/AR2 Etch 395HKD/AR1 Etch 396RIE etch, Si Back etch 397Ashing & Strip/Clean 398Bond Pad Opening 3 - Photo 399Si Etch 400Pad Oxide Etch 401CESL 1 Etch 402CESL 2 Etch 403PMD 1 Etch 404PMD 2 Etch 405PMD 3 Etch 406PMD 4 Etch 407PMD 5 Etch 408RIE etch ILD 1-1 Etch 409RIE etch ILD 1-2 Etch 410RIE etch ILD 2-1 Etch 411RIE etch ILD 2-2 Etch 412RIE etch ILD 3-1 Etch 413RIE etch ILD 3-2 Etch 414Bond Pad Metal 7 Barrier Etch 415Ashing & Strip/Clean

Process Cross-Section

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Step highlight

As device dimensions shrink, plasma-induced phenomena such as the notch effect or RIE lag become significantly more pronounced, requiring advanced process control to maintain uniform etch depths across varying pattern densities [P3].

In depth

In a Backside Illuminated (BSI) CMOS Image Sensor, the active phot…

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Bond Pad Cavity - Photo
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ILD 5-1 SiCN Etch
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