ILD 6-5 deposition forms a dense amorphous silicon carbonitride or silicon nitride film at low temperatures to prevent thermal degradation of underlying interconnects and ensure high wet-etch resistance .
In the 40nm BSI CMOS Image Sensor BEOL flow, the multi-layer ILD 6 stack serves as the found
ational integration platform for the Direct Bond Interconnect (DBI) pad (Engineering Practice). Following the deposition of earlier bulk low-k layers (ILD 6-3 and 6-4) and post-ash cleaning, ILD 6-5 is deposited to function as a dense hermetic barrier and structural support layer (Engineering Practice). This layer prepares the substrate for the subsequent ILD 6-6 wafer bonding layer (WBL) deposition and the critical METAL 8 DBI pad trench lithography . By serving as an intermediate etch-stop and diffusion barrier, ILD 6-5 defines the lower boundary for the upcoming DBI trench etch, preventing over-etching into the underlying interconnects, consistent with the self-aligned etch-stop integration schemes described in . The deposition of ILD 6-5 typically employs plasma-enhanced chemical vapor deposition (PECVD) to form a dense amorphous silicon carbonitride (a-SiCN:H) or silicon nitride film at low temperatures . During the plasma-enhanced reaction, high-energy electrons dissociate the silicon, carbon, and nitrogen-containing precursors, generating reactive radicals that chemisorb onto the wafer surface . The ion bombardment during deposition drives structural densification, squeezing out free volume and minimizing the formation of nanopores . To act as an effective hermetic barrier against moisture and copper diffusion, the film's mass density must exceed a critical threshold and its average pore size must be minimized to enter the molecular size-sieving regime . This physical densification fundamentally suppresses the constrained diffusion of water molecules and metallic ions through the dielectric network . The selection of a carbon-doped silicon nitride or dense nitride for ILD 6-5 balances the competing requirements of a moderately low dielectric constant and high mechanical integrity . Introducing carbon terminal groups reduces network connectivity and polarizability to lower the effective k-value, but excessive carbon incorporation risks increasing porosity and degrading barrier hermeticity . Therefore, RF power and precursor ratios are precisely tuned to maintain an intrinsic compressive stress state, which compensates for any tensile stress induced by prior or subsequent processing steps . Furthermore, a low-temperature plasma process is strictly required to prevent thermal degradation of the underlying interconnects, while still providing sufficient reactive nitrogen species to eliminate organic impurities and ensure a high wet-etch resistance . At the 40nm technology node, specifically for BSI CIS devices, the DBI pad requires extreme planarization and mechanical robustness during the hybrid bonding process . As device dimensions shrink, the transition to porous low-k bulk dielectrics significantly reduces the mechanical modulus and increases susceptibility to plasma-induced damage, as modeled in reductive plasma interactions . ILD 6-5 mitigates these node-specific vulnerabilities by physically sealing the underlying porous structure and providing a rigid, high-modulus backing for the overlying layers . This multi-layered stress-engineering approach is essential to suppress interfacial cracking and electromigration degradation in advanced multi-level BEOL architectures .
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