In the dual-damascene back-end-of-line (BEOL) process flow, the interlayer dielectric (ILD) stack typically consists of an underlying SiCN etch stop/barrier layer and an overlying oxide or low-k ILD layer A1.The preceding step (ILD 4-2 Oxide Etch) etches down through the bulk oxide and stops precisely on this SiCN layer, utilizing the differential etch selectivity between the two dielectric materials A1.The "ILD 4-1 SiCN Etch" step is then required to selectively remove the exposed SiCN at the b