This photolithography step patterns the photoresist mask required for the subsequent heavy n-type ion implantation of the NMOS source/drain (S/D) and pixel floating diffusion (FD) regions T1.It occurs immediately after the formation of the nitride sidewall spacers (SWS) (Engineering Practice).Unlike the earlier NMOS LDD IIP - Photo, which defines shallow extensions self-aligned to the bare gate to suppress short-channel effects T3, this step uses the SWS as an additional physical offset mask to