40nm BSI CMOS Image SensorPreview

Post CMP Cleaning

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Wet Etch Removal of Excess Nitride

Oxide Hard Mask Removal
12SiO Hard Mask deposition13Pre Litho Cleaning14Frontside Deep Trench - Photo15Oxide Hard Mask Etch16Silicon Full Trench Etch (Anisotropic)17Ashing & Strip/Clean18Trench Vacuum dry19SiN Fill20CMP Removal of Excees Nitride21Post CMP Cleaning22Wet Etch Removal of Excess Nitride23Oxide Hard Mask Removal24Pre-Cleaning

Process Cross-Section

F_DTI · FD11 · Wet Etch (H3PO4, Plug Recess to Si)Pixel array viewSiO2 HM (PECVD)SiNSi

Step highlight

unlike dry plasma etching which introduces surface damage, interface traps, and non-stoichiometric layers, wet etching preserves the structural integrity and surface morphology of the underlying and adjacent dielectrics .

In depth

The Wet Etch Removal of Excess Nitride step is critical in the 40nm BSI CMO

S Image Sensor Deep Trench Isolation (DTI) module to completely clear residual silicon nitride (SiN) following the bulk planarization by CMP . Upstream CMP processes inherently struggle with global uniformity across varying pattern densities, often leaving localized SiN residues or micro-scale overburden to avoid severe dishing into the high-aspect-ratio DTI structures . Therefore, this wet etch step functions as a highly selective, isotropic cleanup operation that guarantees the total exposure of the underlying oxide hard mask without mechanically degrading the trench fill . Unlike other nitride etch steps in the flow that define sacrificial masking layers, this specific operation targets the structural gap-fill dielectric residues . Ensuring a completely residue-free surface is essential for the subsequent Oxide Hard Mask Removal and pre-cleaning steps, preventing micro-masking defects that could compromise the final device optical and electrical isolation . The physical mechanism of this step relies on the principles of highly selective, isotropic chemical dissolution . By utilizing a specific wet etchant, typically at elevated temperatures, the process achieves a chemical reaction that selectively breaks the Si-N bonds while exhibiting near-zero reactivity toward the Si-O bonds of the underlying hard mask . This reaction is analogous to selective wet etching techniques where the electrochemical reaction free energy of the target material is significantly lower in the chosen solution than that of the surrounding dielectrics . Because the etch is purely chemical and isotropic, it effectively undercuts and removes SiN residues trapped in micro-scratches or topographical depressions left by the preceding mechanical polishing . Furthermore, unlike dry plasma etching which introduces surface damage, interface traps, and non-stoichiometric layers, wet etching preserves the structural integrity and surface morphology of the underlying and adjacent dielectrics . The selection of a wet etch over an additional dry etch or extended CMP touch-up is driven by the stringent selectivity requirements of the 40nm node . Extended CMP would exacerbate mechanical stress and dishing, potentially compromising the stress-engineered SiN DTI fill that is crucial for modulating carrier mobility and reducing dark current in image sensors . Dry etching, conversely, lacks the infinite selectivity required to stop precisely on the oxide hard mask without consuming it or inducing local electric field enhancement points that degrade dielectric reliability . The wet etch rate is exponentially dependent on the bath temperature and etchant concentration, requiring precise thermodynamic control to balance throughput against the risk of etching into the functional DTI trench . As the etchant becomes saturated with dissolved silicon complexes over multiple wafer batches, the etch rate and selectivity can shift, necessitating strict monitoring of chemical composition and periodic bath replenishment to maintain process stability .

Risks & Challenges

  • [High] Over-etching and DTI Recess: If the wet etch time or temperature exceeds the optimal process window, the isotropic etchant will aggressively attack the SiN fill within the Deep Trench Isolation structures . This localized erosion creates step height variations and structural recesses, similar to the negative profile formation observed during isotropic wet etching of SiN masks . Such a recess weakens the physical and electrical barrier between adjacent pixels, leading to increased crosstalk and degraded image sensor performance .
  • [Medium] Incomplete Residue Removal (Micro-masking): Suboptimal etchant concentration, insufficient bath temperature, or localized flow stagnation can prevent the complete chemical dissolution of post-CMP SiN residues . These surviving residues act as unintended micro-masks during the subsequent Oxide Hard Mask Removal step, locally blocking the oxide etch and leaving dielectric pillars that disrupt subsequent depositions and photolithography .
  • [Medium] Etch Selectivity Degradation: As the wet bath ages and accumulates dissolved silicon and nitrogen byproducts, the chemical equilibrium shifts, potentially reducing the etch selectivity between SiN and the underlying oxide hard mask . If the oxide hard mask is inadvertently thinned or pitted, the active silicon region beneath it may be exposed to subsequent chemical or physical damage, which alters the interface state density and degrades device reliability .
  • [Low] Surface Contamination and Particle Redeposition: Inadequate rinsing or improper fluid dynamics during the wet etch can cause dissolved complexes or colloidal particles to precipitate back onto the wafer surface . These contaminants can induce surface micro-roughness or act as local electric field enhancement points, which are known to reduce breakdown voltage and compromise gate oxide integrity in advanced CMOS devices .

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Related steps

  • SiO Hard Mask deposition
  • Pre Litho Cleaning
  • Frontside Deep Trench - Photo
  • Oxide Hard Mask Etch
  • Silicon Full Trench Etch (Anisotropic)
  • Ashing & Strip/Clean