The VIA 2 - Photo step is a critical lithographic process within the Back-End-Of-Line (BEOL) module, responsible for defining the vertical interconnect structures that bridge adjacent metal layers in a 40nm BSI CMOS Image Sensor A2.Positioned immediately after the deposition of the ILD 2-1 and ILD 2-2 dielectric stacks and subsequent pre-litho cleaning, this step creates the spatial masking pattern required for the subsequent selective plasma etching steps T1.By patterning the photoresist, it di