In the via-first dual-damascene integration scheme, the Metal 3 (M3) vias (V2) have already been etched into the underlying dielectric and cleaned P1.The "METAL 3 TRENCH - Photo" step defines the horizontal routing tracks that will connect these previously etched vias to establish the intermediate back-end-of-line (BEOL) interconnect network T1.Unlike M0 or M1 steps which interface directly with dense transistor contacts, M3 serves as intermediate routing that balances resistance for current-car