40nm BSI CMOS Image SensorPreview

ess that defines and exposes only the NMOS active regions [P2]. The primary objective of this step is to precisely calibrate the threshold voltage ($V_{TH}$) of the NMOS transistors by introducing a controlled dose of p-type dopants into the channel region [T1]. As demonstrated in [P5], this threshold adjustment implant is purposefully executed through a sacrificial oxide layer rather than the final gate dielectric. Performing the implant through this screening oxide prevents surface channeling and protects the underlying silicon from direct crystal damage or metallic contamination, ensuring that the final gate oxide—which will be grown after the sacrificial oxide is stripped—maintains high dielectric breakdown yield [P5]. The physical mechanism of this step relies on altering the semiconductor's localized carrier concentration to modulate the Fermi level near the surface [T1]. The baseline threshold voltage of an MOS device is governed by the flat-band voltage, the surface potential, and the depletion region charge [T1]. By accelerating p-type ions into the substrate, the implant introduces an additional sheet charge within the MOS channel depletion region, effectively shifting the threshold voltage according to the implant dose [T1]. The resulting dopant profile creates a localized increase in acceptor concentration near the surface, which ensures the NMOS operates correctly as an enhancement-mode device with a positive threshold voltage [T2]. The energetic ion cascade displaces silicon atoms, requiring subsequent thermal cycles to activate the dopants and repair the lattice [T1]. Boron is the standard dopant selected for NMOS $V_{TH}$ adjustment due to its behavior as a shallow acceptor in the silicon lattice [T1]. The implant energy is carefully calibrated: it must be sufficiently high to penetrate the sacrificial screening oxide, yet low enough to confine the dopant peak strictly near the silicon surface where the inversion layer will form [T1]. Parameter interaction is highly sensitive; increasing the implant dose raises the threshold voltage, but concurrently increases the average perpendicular electric field in the inversion layer [T3]. As this effective vertical field increases, increased surface scattering causes the electron surface mobility ($\mu_{ns}$) to degrade to a fraction of its bulk value, inherently limiting the transistor's maximum drive current [T3]. In the context of a 40nm BSI CMOS Image Sensor flow, this step is distinct from the preceding photo step, which merely defines the spatial boundaries using photoresist (Engineering Practice). At the 40nm node, standard Boron implants are often supplemented with heavier p-type species like Indium to achieve a steeply retrograded channel doping profile, which suppresses short-channel effects while preserving surface mobility [P4]. Furthermore, because image sensors are highly sensitive to dark current, the channel implant must be carefully co-optimized with pocket and source/drain doping distributions to simultaneously reduce parasitic junction capacitance and suppress junction leakage mechanisms, such as generation-recombination and band-to-band tunneling [P1].