Following the ILD 4-2 Oxide Etch, the wafer contains patterned Metal 5 trenches filled with bulk post-etch photoresist, bottom anti-reflective coating (BARC) residues, and fluorocarbon-based polymeric sidewall passivants A2.The purpose of this Ashing & Strip/Clean step is to completely remove these organic masks and plasma-induced residues without degrading the underlying porous low-k inter-layer dielectric (ILD) P1.This operation prepares a pristine, defect-free dielectric cavity essential for