In a 40nm BSI CMOS Image Sensor (CIS), pixel pitches are extremely small, leading to severe optical and electrical crosstalk (Engineering Practice).To mitigate this, deep trench isolation structures filled with opaque metals, known as vertical grids or light shields, are fabricated between pixels (Engineering Practice).Following the etching and cleaning of the grid trenches, the Mid Vertical Grid Deposition step fills these high-aspect-ratio trenches with a highly reflective and optically dense