40nm BSI CMOS Image Sensor

The "Align Marker Pattern - Photo" step defines the foundational spatial coordinate system for the entire wafer by patterning structures into the previously deposited oxide and nitride layers [A2].Because a newly deposited continuous film stack lacks any topographical features, lithography steppers cannot perform layer-to-layer alignment without these initial reference marks [P2].Following this photo step, the subsequent dry etches will permanently transfer the resist patterns into the underlying nitride and oxide films to form robust alignment structures [A1].To maximize usable chip area, these alignment targets are primarily printed in the scribe lane areas located between the individual product dies [P2].The photolithography process utilizes localized photon exposure to chemically alter the solubility of the photoresist, selectively defining the alignment geometries [P2].The optical resolution of the exposure tool is fundamentally governed by the Rayleigh criterion, which links the minimum resolvable feature size directly to the exposure wavelength and the numerical aperture of the lens system [T1].For maximum measurement precision, the alignment targets are typically designed as periodic gratings, which enables efficient noise suppression through spatial filtering during metrology [P2].Furthermore, an individual alignment target must exhibit 180° rotation symmetry to ensure that the optical alignment sensor correctly identifies the structure's geometric center-of-gravity as the true position coordinate [P2].The selection of the nitride/oxide stack for the marker foundation is highly intentional, as optical alignment relies heavily on distinct step edge detection [P3].Sharp step edges generate robust diffraction and scattering signals, which alignment sensors capture to reconstruct the wafer's geometric topography [P2].Achieving high optical contrast between the patterned mark and the unpatterned background is critical, because alignment tools calculate precise positioning based on grayscale differences and varying reflection intensities [A2].Any significant deviation in the lithography focus or exposure dose can distort the resist pattern morphology, inherently reducing the signal-to-noise ratio necessary for precise edge detection [A1].At the 40nm technology node, the overlay tolerance is strictly constrained to just a few nanometers, necessitating extremely precise control over this initial marker formation [P2].Because thick dielectric film depositions introduce mechanical stress that causes significant wafer warp, defining an accurate 2D wafer grid via these initial marks is critical to compensate for in-plane distortions during all subsequent exposures [P2].To prevent pattern degradation at the boundaries of the alignment segments, optical proximity correction (OPC) techniques are mathematically applied to the photomask to counteract optical diffraction artifacts from neighboring features [T1].This ensures the patterned segments maintain strict geometric fidelity, minimizing systematic variations in the alignment signal [T2].

• [High] Asymmetric Mark Deformation: Coma aberrations or localized focus shifts during the photolithography exposure can cause asymmetric photoresist profiles, which breaks the required 180° rotation symmetry of the alignment target [P2]. This asymmetry shifts the measured center-of-gravity during optical metrology, permanently skewing the global wafer coordinate grid and causing systematic overlay errors for all subsequent processing layers [P2].
• [Medium] Insufficient Optical Contrast: If the resist pattern CD is improperly defined due to dose variations, the subsequent etch will create an alignment mark with degraded step edges [P3]. Poor step definition reduces the grayscale level ratio between the alignment mark and the background, weakening the diffraction signal needed by the metrology sensor and leading to high alignment noise [A2].
• [Medium] Wafer Warp Induced Grid Distortion: The presence of the previously deposited oxide and nitride films introduces mechanical stress that causes significant wafer warp [P2]. If the lithography tool's chucking mechanism cannot perfectly flatten this warped substrate during the marker exposure, the resulting printed marks will encode an in-plane wafer distortion into the fundamental 2D grid, complicating overlay correction models later in the flow [P2].
• [Low] Pattern Bridging in Gratings: The periodic grating structures used for alignment marks are susceptible to optical proximity effects where closely spaced segments merge [T1]. If the optical proximity correction (OPC) applied to the mark layout is insufficient, bridging occurs in the resist, destroying the spatial periodicity required for efficient noise suppression and spatial filtering during alignment [P2].