40nm BSI CMOS Image SensorPreview

re coated with hardened photoresist and highly crosslinked fluorocarbon (CFx) polymeric residues [P1]. This Ashing & Strip/Clean step is critical to remove these contaminants before the subsequent Ta-based liner deposition [A3]. If left uncleaned, these residues will prevent the conformal deposition and adhesion of the barrier layer, leading to high contact resistance and downstream integration failures [P1]. Unlike earlier front-end cleans, this specific BEOL step must carefully balance complete organic residue removal with the strict protection of the mechanically weak, porous low-k dielectric exposed during the MET3 trench etch [P4]. The residue removal typically involves a coupled mechanism of physical modification and wet chemical dissolution [P1]. Traditional high-temperature oxygen plasmas can induce severe plasma-induced damage (PID) by stripping methyl groups from the SiOCH low-k dielectric, densifying the film and drastically increasing its dielectric constant [P1]. To mitigate this, advanced methods utilize alternative low-damage treatments, such as exposing the wafer to nanoscale UV irradiation [P1]. This UV photon energy induces photochemical chain scission in the C-C and C-F backbone of the fluorocarbon residues, reducing their crosslink density and making them structurally loose [P1]. The subsequent wet clean utilizes specific solvents, sometimes incorporating trace metal ions to regulate surface adsorption, to selectively swell and dissolve the modified residues without chemically attacking the porous low-k matrix [A1]. The selection of ashing chemistry and wet clean formulations is strictly constrained by the exposed materials, namely the low-k ILD and the underlying copper at the via bottom [A3]. Highly oxidizing wet chemistries or strongly alkaline solutions can inadvertently corrode exposed metal interconnects or increase the dielectric constant of the ILD by introducing moisture into the pores [A2]. Therefore, advanced formulations often use mild water-organic solvent mixtures designed to effectively dissolve the structurally modified residues [A1]. Process parameters such as UV dose or plasma power must be carefully optimized within a narrow window; an insufficient dose leaves unyielding crosslinked polymers, while an excessive dose can cause secondary crosslinking or exacerbate damage to the fragile low-k Si-CH3 bonds [P1]. In the 40nm BSI CMOS Image Sensor flow, the BEOL interconnects operate under tight pitch constraints, making the physical dimensions and k-value of the ILD highly sensitive to process deviations [P3]. The dual-damascene integration scheme inherently transfers the defect sensitivity to the precision of lithography, etch, and subsequent cleaning efficiency [P3]. Any residual fluorocarbon on the trench sidewall or moisture absorbed into the densified low-k surface directly degrades the time-dependent dielectric breakdown (TDDB) lifetime and increases inter-metal parasitic capacitance, which ultimately limits the device's electrical performance [P4].