40nm BSI CMOS Image SensorPreview

shing step serves as the primary organic removal process, transitioning the wafer from dielectric patterning to the preparation phase for Ta-based liner and Cu seed deposition [T2]. If the resist is not completely removed, subsequent Ta-liner deposition will suffer from poor adhesion and high contact resistance [P2]. Therefore, ashing must efficiently volatilize the bulk resist while preserving the geometric and chemical integrity of the newly etched low-k trench [P3]. Plasma ashing utilizes a plasma source to generate monatomic reactive species, such as oxygen or fluorine, which combine with the photoresist to form volatile ash [A2]. These volatile byproducts are subsequently evacuated by the vacuum pump of the chamber [A2]. The reaction relies on a synergistic coupling where neutral radicals dominate the chemical breakdown of the resist, and ions provide necessary activation energy [P1]. However, because the underlying ILD 5-2 is a low-k dielectric typically containing carbon to lower interconnect capacitance, pure oxygen plasmas aggressively attack the film [T2]. This oxidation causes damage due to the low mechanical strength of the low-k material, leading to an unwanted increase in the dielectric constant [P2]. To mitigate this, the chemical mechanism shifts toward reducing chemistries, such as N2/H2-based plasmas, which can strip the resist without severely oxidizing the dielectric matrix [P3]. The selection of a medium-density plasma, such as a capacitively coupled plasma (CCP) etcher, is favored to minimize physical ion bombardment damage to the fragile low-k dielectric [P3]. Plasma parameters, including gas composition and RF power, must be carefully balanced to suppress charging damage while maintaining an adequate ash rate [P1]. Reducing chemistries are specifically selected over conventional oxygen processes to protect the porous structure and maintain the low RC delay required for advanced circuits [P4]. Modifying the bias voltage helps control the directional kinetic energy of the reactive species, ensuring the primary reaction remains localized to the resist layer [P3]. Post-ashing, a wet strip and clean step is still required to remove highly cross-linked organometallic polymers and sputtering residues that cannot be volatilized by the plasma alone [A1]. At the 40nm node, the adoption of ultra-low-k dielectrics narrows the process window, making the interconnect structure highly susceptible to plasma-induced damage [P4]. The MET6 trenches at this scale exhibit high aspect ratios, requiring reactive radicals to diffuse deeply into confined geometries without recombining prematurely (Engineering Practice). Furthermore, stringent defectivity control is necessary to avoid metal micro-masking during the subsequent barrier/seed deposition [P4]. Thus, the ashing process must achieve complete bulk resist removal while leaving an undamaged, residue-free low-k surface to ensure reliable copper fill in the damascene structure [P2].