Pre Litho Cleaning - 40nm

Excessive chemical activity or temperature may lead to unintended etching or roughening of the dielectric, while insufficient mechanical energy will fail to overcome the adhesion forces of nanoscale particulates .

In the back-end-of-line (BEOL) process flow, the Pre Litho Cleaning step immediate

ly follows the deposition of the ILD 4-1 and ILD 4-2 layers and precedes the VIA 4 photolithography step . As multiple layers are placed on top of each other during IC fabrication, surface irregularities add up, resulting in complex variations for the higher layers . This specific cleaning step at the ILD4 level must account for multi-layer topography accumulations that can result in larger inter-level and intra-level fluctuations compared to lower metal levels . The primary objective of this step is to prepare a pristine, chemically homogenous surface to ensure that the subsequent bottom anti-reflective coating (BARC) and photoresist can be coated with absolute uniformity . By removing stray particles and deposition byproducts from the ILD 4-2 step, this clean prevents coating striations and ensures the entire surface remains within the stringent depth of focus (DOF) requirements of the photolithography system . The physical and chemical mechanisms of this wet cleaning process rely on the combined action of solvent dissolution, chemical oxidation, and modulated surface thermodynamics (Engineering Practice). The cleanliness of the substrate is a significant factor affecting subsequent polymer adhesion, as the presence of dust, particles, or organic substances can severely obstruct effective contact between the photoresist stack and the substrate . The cleaning chemistry typically utilizes dilute alkaline solutions or specialized solvent blends to neutralize surface charges, thereby creating a repulsive Zeta potential that prevents dislodged particles from re-adhering to the wafer (Engineering Practice). Furthermore, this chemical interaction modifies the surface free energy (SFE) of the dielectric . By slightly oxidizing or hydroxylating the ILD surface, the process increases the polar and dispersive components of the SFE, which maximizes the thermodynamic work of adhesion according to Young's equation . This high surface energy helps to form strong adhesion with the subsequent photoresist and BARC layers through van der Waals forces and hydrogen bonding . Wet cleaning is selected for this step over dry plasma descumming primarily to preserve the integrity of the underlying ILD materials . Advanced BEOL structures often incorporate low-k dielectrics to reduce RC delay, but these materials suffer from low mechanical strength and limited process compatibility . Aggressive plasma treatments can induce unwanted surface damage or deplete carbon from the low-k matrix, whereas a carefully optimized wet clean selectively removes contaminants without altering the bulk dielectric properties . The process window is governed by the interactions between chemical concentration, temperature, and mechanical agitation (such as megasonics) (Engineering Practice). Excessive chemical activity or temperature may lead to unintended etching or roughening of the dielectric, while insufficient mechanical energy will fail to overcome the adhesion forces of nanoscale particulates . At the 40nm node for Backside Illuminated (BSI) CMOS image sensors, the metal routing density imposes extremely tight overlay and critical dimension tolerances . When patterning extremely small vias with tight pitches, overlay tolerances must be controlled to a fraction of the via pitch . Any surface contamination or non-uniform wetting during the BARC application can distort the local optical properties (refractive index and extinction coefficient), leading to uncontrolled reflection and critical dimension (CD) swing during exposure . Furthermore, ensuring a defect-free V4 lithography process is uniquely critical for BSI sensors, as uniform BEOL interconnect networks are required to minimize electrical noise and parasitic coupling that could degrade the performance of the underlying pixel array .

[High] Poor Photoresist/BARC Adhesion: Incomplete removal of adventitious organics or failure to adequately raise the surface free energy prevents proper wetting of the BARC and photoresist . This lack of thermodynamic adhesion work leads to micro-delamination or photoresist lifting before full development is completed .
[Medium] Watermark Formation: Incomplete drying or suboptimal surface tension gradient control during the final drying phase leaves residual fluid droplets on the dielectric surface (Engineering Practice). As these droplets evaporate, they precipitate dissolved silica or organics, forming watermarks that locally alter film thickness and optical properties, which subsequently causes depth-of-focus errors during lithography .
[Medium] Dielectric Surface Roughening: Utilizing overly aggressive cleaning chemistry or excessive acoustic energy can physically or chemically degrade the sensitive ILD material . This degradation lowers the mechanical strength of the dielectric surface and can introduce localized thickness variations that negatively impact the uniformity of the subsequent spin-coated layers .
[Low] Particle Re-deposition: Incorrect pH or Zeta potential control within the cleaning bath allows particles that were successfully dislodged to be re-attracted to the dielectric surface via electrostatic forces (Engineering Practice). These re-deposited particles act as micro-masks during the VIA 4 photo exposure, leading to unexposed resist regions and ultimately causing blocked or open vias during the subsequent etch steps .

In the back-end-of-line (BEOL) process flow, the Pre Litho Cleaning step immediate

[High] Poor Photoresist/BARC Adhesion: Incomplete removal of adventitious organics or failure to adequately raise the surface free energy prevents proper wetting of the BARC and photoresist . This lack of thermodynamic adhesion work leads to micro-delamination or photoresist lifting before full development is completed .
[Medium] Watermark Formation: Incomplete drying or suboptimal surface tension gradient control during the final drying phase leaves residual fluid droplets on the dielectric surface (Engineering Practice). As these droplets evaporate, they precipitate dissolved silica or organics, forming watermarks that locally alter film thickness and optical properties, which subsequently causes depth-of-focus errors during lithography .
[Medium] Dielectric Surface Roughening: Utilizing overly aggressive cleaning chemistry or excessive acoustic energy can physically or chemically degrade the sensitive ILD material . This degradation lowers the mechanical strength of the dielectric surface and can introduce localized thickness variations that negatively impact the uniformity of the subsequent spin-coated layers .
[Low] Particle Re-deposition: Incorrect pH or Zeta potential control within the cleaning bath allows particles that were successfully dislodged to be re-attracted to the dielectric surface via electrostatic forces (Engineering Practice). These re-deposited particles act as micro-masks during the VIA 4 photo exposure, leading to unexposed resist regions and ultimately causing blocked or open vias during the subsequent etch steps .

40nm BSI CMOS Image SensorPreview

Process Cross-Section

Step highlight

In depth

Risks & Challenges

40nm BSI CMOS Image SensorPreview

Process Cross-Section

Step highlight

In depth

Risks & Challenges