40nm BSI CMOS Image SensorPreview

and fluorocarbon polymer residues from the newly defined dual-damascene MET4 trenches [A2]. Unlike earlier front-end or lower-metal cleans, this specific MET4 step is uniquely challenging because the surrounding inter-layer dielectric (ILD) consists of highly porous low-k materials that are exceptionally sensitive to plasma and chemical damage [P2]. Establishing a pristine, residue-free trench surface is essential to ensure the continuous nucleation and robust adhesion of the subsequent Ta-based or Ru-Ta alloy diffusion barrier [P3]. If the cleaning process fails to provide a uniform interface, the altered surface energy will cause the subsequent Cu seed layer to agglomerate on the trench sidewalls, resulting in voids that severely degrade the electromigration lifetime of the interconnects [P4]. The operation relies on a sequential combination of dry plasma ashing and wet chemical stripping [A2]. The plasma ashing phase oxidizes the bulk organic photoresist into volatile compounds such as carbon monoxide and carbon dioxide [A2]. However, aggressive plasma chemistries can break critical molecular bonds within the low-k a-SiOxCyNz:H matrix, stripping away terminal organic groups [P2]. This degradation removes the hydrophobic protection of the ILD, opening nanopores that drastically increase the diffusion coefficients for moisture and wet chemicals [P2]. To compensate for this physical vulnerability, the subsequent wet cleaning phase must selectively dissolve the remaining post-plasma etch residues on the sidewalls without penetrating or corroding the weakened low-k dielectric [A2]. To achieve this critical selectivity, modern wet stripping formulations utilize water-soluble organic solvents compounded with carefully selected metal or ammonium ions to modulate interfacial chemical reactivity [A1]. These specific ions promote the swelling and stripping of the highly cross-linked fluorocarbon etch residues while suppressing the chemical attack on the low-k materials [A1]. Additionally, these formulations incorporate organic corrosion inhibitors and multidentate chelating agents that selectively adsorb onto any exposed metallic surfaces at the via bottoms, preventing unintended oxidation or metal loss [A2]. Surfactants are strategically added to reduce the interfacial tension of the solution, allowing the liquid to effectively penetrate the complex residue-dielectric interfaces and accelerate the delamination of organic films [P1]. At the 40nm technology node, the extreme aspect ratios of the MET4 trenches dictate that mechanical fluid agitation alone is insufficient for bottom-up residue removal, making the chemical coordination and mass transfer capabilities of the wet clean the dominant success factors [P1]. Meticulous surface preparation at this dimensional scale is vital to prevent the burying of contaminants, a mechanism fundamentally known to degrade the electrical characteristics and reliability of semiconductor devices [T1]. Furthermore, if the cleaning solvents penetrate the low-k pores due to inadequate process control, the resulting trapped moisture will outgas during the subsequent vacuum barrier deposition, oxidizing the barrier interfaces and acting as a primary root cause for dielectric breakdown and electromigration failure [P2].