The ILD 1-1 SiCN Etch step removes the SiCN layer to expose the underlying metal while maintaining etch selectivity and protecting the metal from over-etching .
In depth
The ILD 1-1 SiCN Etch step serves as the critical etch-stop layer (ESL) opening process in the Via 1 (V1) integration module of the nano
scale BEOL flow . Following the ILD 1-2 Oxide Etch, which clears the bulk via dielectric, the etch front lands on the underlying SiCN layer, which previously protected the Metal 1 (M1) copper from process damage and over-etching . This distinct SiCN breakthrough step removes the barrier to physically expose the M1 conductive routing for the subsequent via metallization (Engineering Practice). Compared to upper-level via etches (e.g. , ILD 2-1 or 3-1), the V1 level bridges the tightest-pitch contact-level structures to intermediate metal layers, demanding stringent control over critical dimensions and alignment to avoid shorts . The physical removal of the SiCN film is driven by fluorinated plasma chemistry, where reactive F atoms and CFx radicals interact with the material surface to generate volatile byproducts like SiF4 . Because the incorporation of carbon into the silicon-nitrogen backbone increases film density and suppresses spontaneous chemical reaction, physical ion bombardment is strictly required to break network bonds and stimulate product desorption . Throughout this process, carbon-containing radicals simultaneously form a fluorinated polymer layer on the via sidewalls . This dynamic competition between chemical etching, ion-assisted bond breaking, and surface passivation governs the etch rate and dictates the final anisotropy of the via profile . Modulating the RF bias directly alters the ion energy transfer, establishing a balance between breaking the dense SiCN bonds and minimizing physical damage to the surrounding structures . SiCN is selected as the etch stop and diffusion barrier material because it offers high etch selectivity against the overlying bulk oxide while exhibiting a lower dielectric constant (k-value) than traditional silicon nitride, thereby mitigating RC delay . The etch process typically employs a mixed fluorocarbon chemistry (such as CF4 or CHF3), where the polymerizing nature of the gas helps slow the etch rate locally and creates the necessary sidewall passivation for high aspect ratio feature transfer . Parameter interactions are tightly coupled; for instance, increasing the etchant gas ratio enhances the chemical removal rate but reduces polymer deposition, which can degrade the protective sidewall layer and cause lateral via bowing . A purely dry Reactive Ion Etch (RIE) approach is utilized to maintain high selectivity and ensure a clean, vertical profile down to the underlying metal layer . At the 40nm technology node, the continuous scaling of devices amplifies the impact of interconnect parasitic capacitance, fundamentally constraining device speed and power as defined by RC delay limits . The transition to tightly pitched interconnects means that via misalignment poses a severe risk, prompting the need for highly selective etch stops to define self-aligned contacts and prevent catastrophic over-etching into adjacent dielectric regions . Furthermore, the narrow feature sizes make the surrounding low-k dielectrics highly susceptible to plasma-induced damage during the SiCN breakthrough . If continuous wave plasma irradiation is excessively prolonged, UV and ion bombardment can break weak Si-CH3 bonds in the adjacent porous ILD, triggering surface decarbonization and structural densification that directly degrades the interconnect's electrical performance .
Risks & Challenges
[High] Incomplete SiCN Opening (Etch Stop Failure): If the local deposition rate of fluorinated polymers from CFx radicals exceeds the rate of ion-assisted physical desorption, the etch process will prematurely self-passivate and stop . This leaves residual dielectric barrier material over the copper line, resulting in high via contact resistance or complete open-circuit failures .
[High] Low-k Dielectric Plasma Damage: Prolonged plasma exposure during the SiCN over-etch phase generates active radicals, ions, and UV/VUV radiation that interact with the surrounding low-k ILD . These species preferentially break the weakly polar Si-CH3 bonds in the porous oxide, transforming the cage-like Si-O structure into a denser network and permanently increasing the interconnect parasitic capacitance .
[Medium] Via Misalignment and Substrate Gouging: At highly scaled dimensions, lithographic overlay errors can misalign the via pattern relative to the underlying metal line . If the SiCN etch chemistry lacks sufficient selectivity, the plasma will etch into the adjacent dielectric spaces alongside the metal line, severely narrowing the insulation margin and risking dielectric breakdown .
[Medium] Underlying Metal Sputtering: Excessive ion bombardment energy intended to break the dense SiCN backbone can physically sputter the exposed M1 copper layer once the barrier is cleared . This sputtered conductive material can redeposit along the lower via sidewalls, creating leakage paths and degrading Time-Dependent Dielectric Breakdown (TDDB) reliability (Engineering Practice).