This photolithography step, VIA 1 - Photo, defines the first vertical interconnect layer (Via 1) within the inter-layer dielectric (ILD) stack of the back-end-of-line (BEOL) module A1.Following the sequential deposition of the ILD 1-1 and ILD 1-2 layers and a pre-litho cleaning process, this step patterns a photoresist mask to expose precise geometric locations for the subsequent dielectric etch T1.In advanced dual-damascene integration schemes, the via pattern is a critical foundational step th