40nm BSI CMOS Image SensorPreview

N FD (Between T1 and T2) Ion Implantation

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Ashing & Strip/Clean

P-Pinning Implant Mask Lithography
92NMOS S/D, FD Implant Mask Lithography93NMOS S/D, FD Ion Implantation94Ashing & Strip/Clean95N FD Implant Mask Lithography96N FD (Between T1 and T2) Ion Implantation97Ashing & Strip/Clean

Process Cross-Section

NFD · NFD3 · Ash / Strip (FD Node Final)n+ S/D (31P+)n+ N-well contact (31P+)p+ surface passivation (10B+)Liner SiO2 (RTP thermal)P-well (pixel array, 11B+)P-well (periphery, 11B+)PD N-well (31P+)N-well (periphery, 31P+)SiP-well (implanted region)SiNPolySWS pad ox (SiO2, PECVD)gate ox (SiO2, thermal)IO/HV gate ox (SiO2; relative thickness shown schematically; IO device not shown in this cross-section)n- LDD (31P+, self-aligned)FD node (31P+)VT adjust (11B+, periphery channel)SiO2 liner (SACVD)SiO2 (SACVD bulk fill)

Step highlight

Consequently, the wet clean chemistry must be carefully optimized—often utilizing highly selective organic solvents or modified dilute cleans—to ensure complete residue removal without etching the highly doped junction .

In depth

This specific Ashing & Strip/Clean step immediately follows the intermediate

N-type Floating Diffusion (NFD) ion implantation in the shared-pixel architecture . During the preceding implant, the photoresist (PR) layer blocking the transfer gates and photodiode regions absorbs high-energy n-type dopants, transforming its upper layer into a highly crosslinked, carbonized crust known as high-dose ion-implanted photoresist (HDI-PR) . This hardened mask must be entirely eradicated before the subsequent P-Pinning photolithography step to ensure precise mask alignment and avoid introducing blocking defects . What distinguishes this step from other routine PR strips in the flow is the critical need to remove the physically hardened HDI-PR without altering the exceptionally sensitive, unannealed dopant profile of the newly formed floating diffusion node . The removal mechanism relies on a synergistic combination of plasma ashing and wet chemical stripping to overcome the physical barriers of the HDI-PR . The heavy ion bombardment from the NFD implant severely alters the surface mechanical properties of the resist, drastically increasing its hardness and elastic modulus . Standard liquid strippers cannot easily penetrate this dense carbonized shell, necessitating a preliminary plasma treatment to induce radical-driven polymer backbone scission and oxidation . High-energy reactive species, such as atomic oxygen and nitrogen radicals, lower the apparent activation energy of the stripping reactions, breaking down the crust so the underlying bulk resist can be dissolved . Following this mechanism, an activated wet stripper solution or a tailored solvent blend is utilized to lift off the residual polymer fragments and inorganic residues from the wafer surface . Material and chemistry selection during the wet clean phase is tightly constrained by the physical state of the underlying NFD silicon . Because the n-type dopants reside in a highly concentrated, unannealed, shallow surface layer, the silicon substrate is extremely vulnerable to chemical attack . Standard RCA SC1 (NH4OH/H2O2/H2O) cleaning sequences induce simultaneous oxidation and dissolution of the silicon surface, which can etch away critical nanometers of the substrate . For shallow, unannealed n-type implants, this chemical etching directly shaves off the peak dopant concentration, leading to massive dopant loss and an unacceptable reduction in active carrier concentration . Consequently, the wet clean chemistry must be carefully optimized—often utilizing highly selective organic solvents or modified dilute cleans—to ensure complete residue removal without etching the highly doped junction . At the 40nm CMOS Image Sensor node, controlling the exact dimensions and dopant volume of the floating diffusion is paramount because it dictates the node's capacitance and the pixel's conversion gain . Any plasma-induced charging or defect generation during the ash process could trap charges in the adjacent T1 and T2 transfer gate oxides, shifting the threshold voltage and inducing image lag . Furthermore, complete suppression of chemical dopant etching at this stage ensures that the resulting energy-band profile and barrier heights match the theoretical models required for optimal charge transfer .

Risks & Challenges

  • [High] Severe Dopant Loss in Unannealed FD: If an aggressive oxidizing wet clean (such as SC1) is applied, the chemical oxidation-dissolution reaction will etch the silicon surface, removing the shallow peak of the unannealed n-type dopants . This dopant loss fundamentally alters the floating diffusion capacitance and severely degrades the pixel's conversion gain .
  • [High] HDI-PR Crust Residue Retention: The NFD ion implant hardens the resist surface, significantly altering its elastic modulus and hardness . If the plasma activation energy is insufficient to break the polymer backbone of this crust, the subsequent wet stripper will fail to penetrate and dissolve the bulk resist, leaving residues that block the subsequent P-Pinning implant .
  • [Medium] Plasma-Induced Gate Dielectric Damage: Prolonged exposure to plasma during the ashing step can subject the adjacent T1 and T2 transfer gates to high-energy ion bombardment . This interaction creates interface states and charge-trapping defects within the gate dielectric, leading to threshold voltage shifts and increased leakage in the control circuits .
  • [Medium] Fluorocarbon-like Polymer Readhesion: If carbon-rich or fluorine-based polymers were residually present from earlier masking steps, they form highly crosslinked networks that resist standard wet solvents . Without proper pre-treatment (such as tailored plasma activation or UV irradiation) to lower the crosslink density, these residues remain on the wafer and contaminate the active area .

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Related steps

  • N FD Implant Mask Lithography
  • N FD (Between T1 and T2) Ion Implantation