Modern CMOS processes require devices operating at different voltage levels, necessitating varied gate insulator thicknesses to balance drive current and dielectric breakdown limits T2.In this specific integration flow, a thin gate oxide and a subsequent nitride hard mask have already been deposited across the wafer A2.The "Thick Gate Oxide - Photo" step utilizes photolithography to selectively define regions where the high-voltage devices, such as I/O transistors or image sensor transfer gates,