In the 40nm BSI CMOS Image Sensor flow, the gate module defines the critical channel-control structures of the transistors T1.Preceding this step, an As-doped polysilicon layer was deposited and subjected to a high-temperature activation anneal to set the gate work function and reduce sheet resistance T1.This specific Pre Litho Cleaning step prepares the annealed polysilicon surface for the subsequent Gate Formation photolithography and PolySi Etch processes A1.Unlike other pre-litho cleans in t