In the 40nm Backside Illuminated (BSI) CMOS Image Sensor process flow, the fabrication of on-chip lenses (OCL) requires precise optical stack engineering to maximize light collection efficiency P2.The Lower OCL Coating Etch step occurs within the packaging-related BONDPAD module, immediately following the Optical Pad 3 Etch and preceding the main Lower OCL Etch (Engineering Practice).The primary purpose of this step is to cleanly break through a specialized planarizing or anti-reflective coating