In a 40nm Backside Illuminated (BSI) CMOS Image Sensor, minimizing optical crosstalk between adjacent highly-scaled pixels is paramount for preserving image sharpness and color fidelity T1.The Mid Vertical Grid Trench - Photo step defines the structural boundaries within the backside optical stack, specifically positioned above the silicon surface but below the uppermost color filters (Engineering Practice).Following Optical Pad 3 planarization (CMP) and associated cleaning steps, this lithograp