28nm Planar Flow

Device Context and Integration Rationale

The Pad Oxide Remove for Thick Gate step is positioned immediately after well formation and stabilization anneal to deliberately reset the silicon surface condition before any gate dielectric formation begins, because the residual pad oxide grown or modified during well processing would otherwise become an uncontrolled interfacial layer beneath the thick gate oxide [T1]. During well implantation and subsequent high‑temperature annealing, the pad oxide…

• [High] Residual Pad Oxide Patches: Incomplete chemical removal leaves localized SiO₂ islands that act as an uncontrolled interfacial dielectric, increasing local EOT and causing threshold voltage non‑uniformity through series capacitance effects [T1].