Technical Blog
Deep dive into the physics and integration logic of semiconductor manufacturing
14nm FinFET Fin Recess Integration Process Flow: Principles, Mechanisms, and Module Dependencies
Role in the Complete Flow The 14nm FinFET fin recess module occupies a pivotal position within the overall 14nm FinFET process flow, sitting between shallow tre
28nm Planar Gate Stack Integration Process Flow: Principles, Mechanisms, and Integration Logic
Role in the Complete Flow The 28nm planar gate stack integration is one of the most critical modules in the entire 28nm Planar process flow, sitting at the inte
40nm BSI CMOS Image Sensor Metal-Two Interconnect Integration: Process Flow Principles and Device Physics
Role in the Complete Flow The metal-two (MET2) interconnect module in a 40nm BSI CMOS Image Sensor sits at a critical juncture in the frontside metallization se
7nm FinFET Metal-One Interconnect Integration: Process Flow Principles and ESL Deposition Mechanics
Role in the Complete Flow The metal-one (M1) interconnect module in a 7nm FinFET technology node occupies a pivotal position in the process architecture: it is
40nm BSI CMOS Image Sensor Gate Stack Integration: Process Flow Principles and Device Physics
Role in the Complete Flow In a 40nm backside illumination (BSI) complementary metal-oxide semiconductor (CMOS) image sensor process, the gate stack module sits
28nm Planar Source-Drain Integration Process Flow: Principles, Mechanisms, and Integration Logic
Role in the Complete Flow The source-drain (SD) module in the 28nm planar logic flow sits at a pivotal position within the front-end-of-line (FEOL) sequence P2.
28nm Planar Metal-One Interconnect Integration: Process Flow Principles and Integration Logic
Role in the Complete Flow The metal-one (M1) interconnect module in the 28nm planar technology node occupies a pivotal position in the back-end-of-line (BEOL) s
7nm FinFET Metal-Zero Interconnect Integration: Process Flow Principles, ESL Deposition Mechanics, and Module Dependencies
Role in the Complete Flow The metal-zero (M0) interconnect module sits at a pivotal junction in the 7nm FinFET process flow, bridging the middle-of-line (MOL) c
40nm BSI CMOS Image Sensor Fourth Interlayer Dielectric Integration: Process Flow Principles and Device Physics
Role in the Complete Flow The fourth interlayer dielectric (ILD4) module in a 40nm backside-illuminated (BSI) complementary metal-oxide-semiconductor (CMOS) ima
40nm BSI CMOS Image Sensor Metal-Zero Interconnect Integration: Process Flow, Mechanisms, and Integration Logic
Role in the Complete Flow In the 40nm back-side illuminated (BSI) complementary metal-oxide-semiconductor (CMOS) image sensor fabrication sequence, the metal-ze
40nm BSI CMOS Image Sensor Second Interlayer Dielectric Integration: Process Flow Principles and Physics
Role in the Complete Flow The second interlayer dielectric (ILD2) module in a 40nm backside-illuminated (BSI) CMOS image sensor sits at a pivotal position withi
40nm BSI CMOS Image Sensor Via-Three Integration: Process Flow Principles and Device Physics
Role in the Complete Flow In the 40nm BSI CMOS Image Sensor process flow, the via-three (V3) integration module occupies a critical inter-tier connectivity posi