SemiFlows
FlowsAdvantagesPricingFAQAboutBlog

SemiFlows

Semiconductor process knowledge — flow visualization + Flow-aware, evidence-linked Q&A

FlowsAdvantagesPricingAboutFAQBlogConceptsContact Us

© 2026 SemiFlows. All rights reserved.

Terms of ServiceRefund PolicyPrivacy Policysupport@semiflows.comPayments by Paddle.com
SemiFlows
FlowsAdvantagesPricingFAQAboutBlog

Understand optical lithography principles from DUV to EUV. Covers resolution limits, multi-patterning strategies (SADP/SAQP), resist chemistry, and how wavelength reduction drives transistor density scaling.

7 articles
overlay vs edge placement errorphotolithographylithographypre-litho cleanarf immersion lithographyphotolithography

Related Process Flows

7nm FinFET7nm714 steps14nm FinFET14nm362 steps28nm Planar Flow28nm266 steps

Technical Blog

Deep dive into the physics and integration logic of semiconductor manufacturing

LithographySep 11, 20265 min read

Overlay vs Pattern Edge Error: Which Boundary Moved?

Separate pattern translation, width change and local edge variation to understand overlay and edge-placement error.

LithographyJul 4, 20266 min read

Photolithography in Semiconductor Manufacturing: Physics, Chemical Mechanisms, and Process Principles

Photolithography, also referred to as optical lithography or ultraviolet (UV) lithography, is the process by which geometric circuit patterns are transferred from a photomask…

LithographyMay 30, 20265 min read

Lithography in Advanced Semiconductor Manufacturing: Physics, Chemical Mechanisms, and Node Evolution

In modern integrated circuit (IC) fabrication, lithography serves as the fundamental cornerstone for pattern generation and transfer.

LithographyMay 28, 20265 min read

Pre-Litho Clean: Fundamental Principles, Chemical Mechanisms, and Node Evolution in Advanced Semiconductor Manufacturing

In the realm of ultra-large-scale integration (ULSI), surface cleaning is a continuous and critical necessity.

LithographyMay 25, 20265 min read

ArF Immersion Lithography: Physics, Process Principles, and Sub-10nm Scaling

For decades, the semiconductor industry has relentlessly pursued scaling to maintain the performance gains and cost reductions predicted by Moore’s Law.

LithographyMar 29, 20265 min read

Photolithography in a 40nm Process Flow

Photolithography exposes and develops a resist image that guides later pattern transfer. The number of lithography steps varies by chip flow.

LithographyMar 15, 20266 min read

Extreme Ultraviolet Lithography: Principles, Physics, and the Path to Sub-5nm Semiconductor Manufacturing

What Is Extreme Ultraviolet Lithography and Why Does It Matter? In the relentless pursuit of smaller, faster, and more energy-efficient semiconductor devices, lithography has…

SemiFlows

Semiconductor process knowledge — flow visualization + Flow-aware, evidence-linked Q&A

FlowsAdvantagesPricingAboutFAQBlogConceptsContact Us

© 2026 SemiFlows. All rights reserved.

Terms of ServiceRefund PolicyPrivacy Policysupport@semiflows.comPayments by Paddle.com
AllDepositionEtchingLithographyCMPIon ImplantationProcess IntegrationMaterialsInterconnectDevice PhysicsThermal Processing