SemiFlows
FlowsAdvantagesPricingFAQAboutBlog

SemiFlows

Semiconductor process knowledge — flow visualization + Flow-aware, evidence-linked Q&A

FlowsAdvantagesPricingAboutFAQBlogConceptsContact Us

© 2026 SemiFlows. All rights reserved.

Terms of ServiceRefund PolicyPrivacy Policysupport@semiflows.comPayments by Paddle.com
SemiFlows
FlowsAdvantagesPricingFAQAboutBlog

Dive into the material science of semiconductor fabrication — high-k dielectrics, metal gates, strain engineering materials. Understand band alignment, work function tuning, and interface physics that govern device performance.

35 articles
film stress vs channel strainmicrolens reflow mechanism in CMOS image sensors14nm FinFET contact etch-stop and pre-metal dielectric integration process flow14nm FinFET second pre-metal dielectric integration process flow40nm BSI CMOS Image Sensor backside passivation integration process flow40nm BSI CMOS Image Sensor color-filter array integration process flow

Related Process Flows

7nm FinFET7nm714 steps14nm FinFET14nm362 steps28nm Planar Flow28nm266 steps

Technical Blog

Deep dive into the physics and integration logic of semiconductor manufacturing

MaterialsSep 11, 20265 min read

Film Stress vs Channel Strain: Follow the Mechanical Link

Follow the link from film stress to channel strain and transport, keeping mechanical and electrical evidence separate.

MaterialsSep 3, 20266 min read

Mastering the Upper OCL Reflow Mechanism in 40nm BSI CMOS Image Sensors: Physics, Surface Free Energy, and Optical Integration

Function in the Complete Flow In a modern 40nm backside illuminated (BSI) complementary metal-oxide-semiconductor (CMOS) image sensor (CIS), the optical stack above the silicon…

MaterialsAug 11, 20266 min read

14nm FinFET Contact Etch-Stop and Pre-Metal Dielectric Integration Process Flow: Principles, Mechanisms, and Integration Logic

Role in the Complete Flow The 14nm FinFET contact etch-stop and pre-metal dielectric (PMD) integration sits at a critical juncture in the transistor fabrication sequence — after…

MaterialsAug 11, 20266 min read

14nm FinFET Second Pre-Metal Dielectric Integration: Process Flow Principles and Mechanisms

Role in the Complete Flow In the 14nm FinFET technology platform, the second pre-metal dielectric (PMD2) module occupies a pivotal position between front-end-of-line (FEOL)…

MaterialsAug 11, 20266 min read

40nm BSI CMOS Image Sensor Backside Passivation Integration: Process Flow Principles and Device Physics

Role in the Complete Flow In a 40nm BSI CMOS Image Sensor (CIS) process flow, the backside passivation (BKPAS) module occupies a critical position between backside wafer thinning…

MaterialsAug 11, 20266 min read

40nm BSI CMOS Image Sensor Color-Filter Array Integration: Process Flow Principles and Device Physics

Role in the Complete Flow The color-filter array (CFA) integration module in a 40nm backside illumination (BSI) complementary metal-oxide-semiconductor (CMOS) image sensor…

MaterialsAug 11, 20265 min read

40nm BSI CMOS Image Sensor First Interlayer Dielectric Integration: Process Flow Principles and Module Logic

Role in the Complete Flow The 40nm BSI CMOS Image Sensor first interlayer dielectric (ILD1) module represents a critical back-end-of-line (BEOL) dielectric module.

MaterialsAug 11, 20266 min read

40nm BSI CMOS Image Sensor Second Interlayer Dielectric Integration: Process Flow Principles and Physics

Role in the Complete Flow The second interlayer dielectric (ILD2) module in a 40nm backside-illuminated (BSI) CMOS image sensor sits at a pivotal position within the 40nm BSI…

MaterialsAug 11, 20266 min read

40nm BSI CMOS Image Sensor Third Interlayer Dielectric Integration: Process Flow Principles and Device Physics

Role in the Complete Flow The third interlayer dielectric (ILD3) module in a 40nm BSI CMOS Image Sensor occupies a pivotal position within the back-end-of-line (BEOL)…

MaterialsAug 11, 20266 min read

40nm BSI CMOS Image Sensor Fourth Interlayer Dielectric Integration: Process Flow Principles and Device Physics

Role in the Complete Flow The fourth interlayer dielectric (ILD4) module in a 40nm backside-illuminated (BSI) complementary metal-oxide-semiconductor (CMOS) image sensor (CIS)…

MaterialsAug 11, 20266 min read

40nm BSI CMOS Image Sensor Fifth Interlayer Dielectric Integration Process Flow: Principles, Mechanisms, and Integration Logic

Role in the Complete Flow In the 40nm backside-illuminated (BSI) complementary metal-oxide-semiconductor (CMOS) image sensor process, the fifth interlayer dielectric (ILD5)…

MaterialsAug 11, 20266 min read

40nm BSI CMOS Image Sensor ILD6 Integration: Process Flow Principles and Dielectric Physics

Role in the Complete Flow In a 40nm back-side illuminated (BSI) complementary metal-oxide-semiconductor (CMOS) image sensor fabrication sequence, the sixth interlayer dielectric…

1 / 3Next

SemiFlows

Semiconductor process knowledge — flow visualization + Flow-aware, evidence-linked Q&A

FlowsAdvantagesPricingAboutFAQBlogConceptsContact Us

© 2026 SemiFlows. All rights reserved.

Terms of ServiceRefund PolicyPrivacy Policysupport@semiflows.comPayments by Paddle.com
AllDepositionEtchingLithographyCMPIon ImplantationProcess IntegrationMaterialsInterconnectDevice PhysicsThermal Processing