Technical Blog
Deep dive into the physics and integration logic of semiconductor manufacturing
14nm FinFET Sidewall Spacer Integration Process Flow: Principles, Mechanisms, and Module Dependencies
Role in the Complete Flow The sidewall spacer module in a 14nm FinFET process flow occupies a pivotal position between gate patterning and source/drain (S/D) ep
14nm FinFET Shallow Trench Isolation Process Flow: Integration Principles, Physical Mechanisms, and Module Dependencies
Role in the Complete Flow In the 14nm FinFET process flow, the shallow trench isolation (STI) module occupies a foundational position: it is the first major str
14nm FinFET Process Flow: Integration Logic, Device Physics, and Module Dependencies
Process Map and Scope The 14nm FinFET process flow represents a defining moment in semiconductor scaling: the second generation of three-dimensional transistors
7nm FinFET Dummy-Poly Opening and Planarization Process Flow: Integration Principles, Physical Mechanisms, and Module Dependencies
Role in the Complete Flow The 7nm FinFET dummy-poly opening and planarization (POP) module sits at a pivotal junction in the replacement metal gate (RMG) integr
7nm FinFET Shallow Trench Isolation Process Flow: Integration Principles and Device Physics
Role in the Complete Flow In a 7nm FinFET process flow, the shallow trench isolation (STI) module occupies a critical position between substrate preparation and
40nm BSI CMOS Image Sensor Frontside Deep-Trench Isolation Process Flow: Integration Principles, Device Physics, and Module Dependencies
Role in the Complete Flow The frontside deep-trench isolation (F_DTI) module in a 40nm BSI CMOS Image Sensor sits at a critical junction between front-end devic
28nm Planar Shallow Trench Isolation Process Flow: Principles, Integration Logic, and Mechanisms
Role in the Complete Flow The 28nm Planar shallow trench isolation module is one of the earliest structural-defining steps in the entire 28nm Planar process flo
28nm Planar Sidewall Spacer Integration Process Flow: Principles, Mechanisms, and Integration Logic
Role in the Complete Flow The sidewall spacer module sits at a critical junction in the 28nm Planar process flow, bridging gate stack formation and source/drain
Engineering the Second PMD Layer: Physical Principles, Process Integration, and Advanced Node Scaling
Introduction In the hierarchy of semiconductor interconnect fabrication, the dielectric stack between active device terminals and the first metal interconnect l
Fundamental Principles of Chemical Mechanical Polishing in Semiconductor Manufacturing: Physics, Mechanisms, and Integration
Introduction Chemical mechanical polishing (CMP), sometimes referred to as chemical mechanical planarization, is a precision surface finishing process that comb
Fundamental Principles of Temperature in Semiconductor Manufacturing: Physics, Process Integration, and Advanced Node Evolution
Introduction Temperature is far more than a mere process dial in semiconductor manufacturing — it is the fundamental thermodynamic driving force that governs ne
Understanding Damage in Semiconductor Manufacturing: Physical Mechanisms, Process Interactions, and Advanced Node Challenges
Introduction Damage in semiconductor manufacturing refers to any unintended alteration of the crystalline lattice, material microstructure, or electrical proper