28nm Planar Redistribution Via and Aluminum Pad Integration: Process Flow Principles and Integration Logic

Role in the Complete Flow

The 28nm Planar redistribution via and aluminum pad integration module occupies a critical position near the terminal portion of the back-end-of-line (BEOL) sequence. At this stage, the wafer has completed the copper interconnect stack — from the first metal level through the 28nm Planar upper-metal interconnect integration process flow — and the module's primary task is to bridge the uppermost copper metallization to externally accessible aluminum bonding pads. This transition is essential because copper, while highly conductive for high-density on-chip signal routing, rapidly forms unstable native oxides and is vulnerable to corrosion and oxidation when exposed directly to ambient packaging environments. The redistribution via serves as the vertical interconnect element that transfers electrical signals from the top copper level to the aluminum pad, while the silicon nitride dielectric provides isolation and moisture passivation around this transition region.

What this module receives is a planarized dielectric passivation layer covering the top copper interconnect level. What it delivers downstream to assembly and packaging is an array of patterned aluminum pads that provide mechanical and electrical contact sites for wire bonding, flip-chip solder bumping, or automated wafer-level probe testing. The downstream consumer of this module is the assembly flow, which relies on pad planarity, structural adhesion, and low contact resistance to ensure packaging yield. Within the context of the overarching 28nm Planar process flow, this module represents the final wafer-level metallization sequence before wafer inspection, singulation, and packaging.

Entry State and Sequence Logic

The entry state for this module is defined by the completion of the final copper metal interconnect layer sealed beneath a top passivation dielectric stack. The process sequence follows a strict chronological and physical dependency chain:

1. Passivation Dielectric Stack Deposition: Silicon nitride dielectric film is deposited via PECVD over the top copper layer, followed by a silane-based oxide layer to establish the passivation insulator stack.
2. Via Patterning and Etching: Lithography defines the redistribution via openings above the copper landing areas, followed by selective dielectric plasma etching to expose copper, and wet cleaning to remove polymer residues.
3. Barrier and Adhesion Layer Deposition: A tantalum nitride barrier and a titanium/titanium nitride liner are deposited to prevent copper-aluminum interdiffusion and ensure mechanical adhesion to the dielectric sidewalls.
4. Pad Metallization and Anti-Reflective Coating: Thick aluminum metal is sputtered to fill the via openings and form the conductive pad layer, followed by anti-reflective coating deposition and scrubber cleaning to prepare for lithography.
5. Pad Patterning and Surface Passivation: Photolithography defines pad geometry, subtractive chlorine-based plasma etching transfers the pattern, and solvent cleaning with post-etch oxygen plasma treatment eliminates residual chlorine and forms a protective native oxide.

This sequence logic depends closely on upstream integration choices. If downstream packaging employs copper bumps instead of wire bonding, decisions made in the 28nm Planar copper bump integration process flow govern whether the aluminum pad serves as the final surface or as a seed-layer landing platform.

Physical and Chemical Mechanisms

RV Nitride Deposition

The silicon nitride film deposited by PECVD forms a hermetic dielectric barrier directly over the final copper level. In PECVD, silane (SiH4) and ammonia (NH3) or nitrogen (N2) precursors are dissociated in a radio-frequency (RF) plasma environment. The resulting reactive radicals adsorb on the wafer surface to synthesize hydrogenated amorphous silicon nitride (SiN). Film stress is governed by energetic ion bombardment and chemical bond hydrogen content. High-frequency RF power increases ion bombardment, producing denser films with higher compressive stress, whereas lower bombardment yields less dense, lower-stress films. Balancing these deposition modes avoids film delamination over copper pads while maintaining moisture barrier performance.

Barrier Layer and Via Formation

The barrier layer isolates the underlying copper from the aluminum pad metal. Without an effective refractory barrier, copper and aluminum rapidly interdiffuse at elevated assembly temperatures, forming brittle copper-aluminum intermetallic compounds (such as CuAl2) that cause voiding, high electrical resistance, and mechanical failure. Chemical vapor deposition of titanium nitride achieves higher step coverage on via sidewalls and bottoms than physical vapor deposition techniques [P1]. While using a tungsten plug produces a smoother surface topography over the contact or via, upper redistribution modules often deposit barrier and pad metals directly into the via opening [T1]. The combination of a tantalum nitride liner and a titanium/titanium nitride adhesion layer ensures both low interfacial contact resistance and strong adhesion to the surrounding silane oxide dielectric.

Aluminum Pad Deposition

Aluminum pad deposition relies on physical vapor deposition (sputtering), typically utilizing an aluminum alloyed with small fractions of copper and silicon. Copper additions suppress electromigration by pinning grain boundaries, while silicon prevents aluminum spiking into underlying silicon features if junction contact occurs elsewhere. Subtractive etching of the aluminum pad stack is executed using chlorine-based plasma chemistry (e.g., BCl3/Cl2). The plasma generates reactive chlorine species that react with aluminum to form volatile AlCl3. Because residual chlorine on aluminum sidewalls can react with ambient moisture to form hydrochloric acid (HCl)—inducing severe corrosion—the module concludes with solvent cleaning and post-etch oxygen plasma treatment to displace residual chlorine and form a stable native aluminum oxide (Al2O3) passivation layer.

Interfaces and Failure Propagation

RV Nitride / Copper Interface

The interface between the PECVD silicon nitride and the underlying copper pad is highly vulnerable to thermal-mechanical stress mismatch. During downstream packaging thermal cycles, excessive intrinsic film stress or weak interfacial surface preparation can induce interfacial micro-cleavage or delamination. This failure mode propagates as localized dielectric lifting, allowing moisture ingress that oxidizes the underlying copper pad and degrades contact resistance.

Barrier Layer / Aluminum Interface

If the barrier layer is discontinuous or too thin along the via sidewall corners, local barrier breakdown occurs. Copper atoms migrate into the aluminum layer during high-temperature wire bonding or mold compound curing. The formation of resistive, brittle intermetallic phases causes localized voiding (Kirkendall voiding) directly above the via, leading to intermittent open circuits or pad detachment under mechanical strain.

Aluminum Pad / RV Nitride Interface

During thermosonic wire bonding, the aluminum pad experiences severe lateral shear forces. If the adhesion between the barrier/glue stack and the underlying dielectric is compromised by organic contamination or incomplete surface pre-cleaning, pad lifting occurs. The mechanical shear force propagates through the metal-dielectric interface, tearing the entire pad off the substrate and resulting in immediate die failure.

Dielectric Leakage and Integrity

If the silicon nitride or oxide layers suffer from pinholes, local plasma etch damage, or non-uniform deposition, the dielectric strength between adjacent vias or routing lines is compromised. Under operational voltage bias, high local electric fields at via corners drive trap-assisted conduction or Poole-Frenkel emission, causing elevated dielectric leakage currents and potential breakdown between adjacent signal paths.

Walk the Real Module

To explore the step-by-step execution of the 28nm Planar redistribution via and aluminum pad integration, readers can Open RV Nitride Deposition in the interactive flow. This interactive flow details the chronological sequence from initial dielectric deposition through post-etch oxygen treatment.

The process opens with silicon nitride dielectric deposition and silane oxide deposition, establishing the passivation stack over the final copper layer. Photolithography and dry plasma etching define and open the redistribution via, exposing the copper surface before a wet strip removes residual photoresist. Metallization begins with barrier deposition and adhesion layer sputtering, followed immediately by thick aluminum pad deposition, which fills the via and covers the field area. The surface is then capped with an anti-reflective coating, scrubbed clean, and coated with a dielectric anti-reflective layer. Pad photolithography guides the subtractive aluminum pad etch, which defines the pad structure. The module concludes with solvent cleaning and post-etch oxygen plasma treatment to eliminate corrosive chlorine species and passivate the pad sidewalls.

Related Learning Paths

To build a comprehensive understanding of the 28nm Planar BEOL architecture, the following adjacent process guides provide critical context:

• The 28nm Planar upper-metal interconnect integration process flow explains the dual-damascene copper interconnect levels that lie directly beneath the passivation stack.
• The 28nm Planar copper bump integration process flow outlines alternative packaging interfaces where redistribution vias connect to under-bump metallization and micro-bumps rather than wire-bondable aluminum pads.
• The foundational 28nm Planar process flow details the complete integration map connecting front-end transistor fabrication to terminal packaging operations.

Future Outlook

As interconnect structures scale, redistribution via and aluminum pad modules face evolving physical limitations. At advanced nodes, conventional PECVD silicon nitride films are increasingly limited by step coverage in narrow, high-aspect-ratio vias. Plasma-enhanced atomic layer deposition (PEALD) for silicon nitride is being introduced to provide atomic-scale conformality and low hydrogen incorporation, reducing dielectric leakage at reduced thermal budgets.

For metallization, traditional subtractive aluminum pad etching faces challenges with chlorine corrosion and metal line pitch scaling. Advanced packaging integration strategies are exploring selective barrier chemical mechanical planarization (CMP) and direct copper pad redistribution stacks with nickel-palladium-gold (Ni/Pd/Au) surface finishes. These copper-based redistribution architectures eliminate the copper-aluminum interface entirely, avoiding intermetallic formation and providing enhanced electromigration resistance for demanding high-power and high-density packaging applications.