Technical Blog
Deep dive into the physics and integration logic of semiconductor manufacturing
7nm FinFET Process Flow: Integration Principles, Device Physics, and Module Dependencies
Process Map and Scope The 7nm FinFET technology node represents a pivotal generation in advanced logic semiconductor manufacturing, where three-dimensional chan
40nm BSI CMOS Image Sensor Backside Substrate-Contact Integration Process Flow: Principles, Mechanisms, and Module Dependencies
Role in the Complete Flow In a 40nm backside-illuminated (BSI) complementary metal-oxide-semiconductor (CMOS) image sensor (CIS) fabrication sequence, the backs
40nm BSI CMOS Image Sensor Sidewall Spacer Integration: Process Flow Principles and Device Physics
Role in the Complete Flow The sidewall spacer (SWS) module in a 40nm back-side illuminated (BSI) complementary metal-oxide-semiconductor (CMOS) image sensor occ
40nm BSI CMOS Image Sensor Shallow Trench Isolation Process Flow: Integration Logic, Mechanisms, and Engineering Tradeoffs
Role in the Complete Flow In a 40nm backside illumination (BSI) complementary metal-oxide semiconductor (CMOS) image sensor, the shallow trench isolation (STI)
40nm BSI CMOS Image Sensor Process Flow: Integration Principles, Device Physics, and Module Dependencies
Process Map and Scope The 40nm BSI CMOS Image Sensor represents a convergence of advanced CMOS logic fabrication technology with specialized optoelectronic devi
40nm BSI CMOS Image Sensor Starting Wafer and Substrate Preparation: Principles, Integration Logic, and Process Physics
Role in the Complete Flow The 40nm BSI CMOS Image Sensor starting wafer and substrate preparation module — often referred to as the WFR module — is the foundati
28nm Planar Process Flow: Integration Logic, Device Physics, and Module Dependencies
Process Map and Scope The 28nm Planar process flow represents the final major technology generation built on classical planar metal-oxide-semiconductor field-ef
40nm BSI CMOS Image Sensor Backside Wafer Thinning Process Flow: Integration Principles and Physical Mechanisms
Role in the Complete Flow The 40nm BSI CMOS Image Sensor represents a generation of imaging devices where the photodiode array and the readout circuitry occupy
7nm FinFET Starting Wafer and Substrate Preparation: Integration Principles, Device Physics, and Process Flow
Role in the Complete Flow The starting wafer and substrate preparation (WFR) module is the foundational entry point of the entire 7nm FinFET process flow P1. Be
14nm FinFET Starting Wafer and Substrate Preparation: Integration Logic, Physics, and Module Fundamentals
Role in the Complete Flow The 14nm FinFET starting wafer and substrate preparation module — often referred to as the WFR (wafer start) module — is the very firs
28nm Planar Redistribution Via and Aluminum Pad Integration: Process Flow Principles and Integration Logic
Role in the Complete Flow The 28nm Planar redistribution via and aluminum pad integration module occupies a critical position near the terminal portion of the b
14nm FinFET Shallow Trench Isolation Notch Integration: Process Flow Principles and Mechanism Deep Dive
Role in the Complete Flow In the 14nm FinFET technology node, the shallow trench isolation (STI) notch module occupies a uniquely critical position within the b