Technical Blog
Deep dive into the physics and integration logic of semiconductor manufacturing
40nm BSI CMOS Image Sensor Dual Gate-Oxide Integration Process Flow: Principles, Mechanisms, and Integration Logic
Role in the Complete Flow The 40nm BSI CMOS Image Sensor dual gate-oxide (DGOX) integration module occupies a pivotal position within the overall front-end-of-line (FEOL) process…
40nm BSI CMOS Image Sensor Gate Stack Integration: Process Flow Principles and Device Physics
Role in the Complete Flow In a 40nm backside illumination (BSI) complementary metal-oxide semiconductor (CMOS) image sensor process, the gate stack module sits at a pivotal…
40nm BSI CMOS Image Sensor Pixel and Peripheral NMOS Integration Process Flow: Principles, Mechanisms, and Integration Logic
Role in the Complete Flow In a 40nm BSI (Backside Illumination) CMOS image sensor, the pixel and peripheral NMOS integration module occupies a pivotal position within the overall…
40nm BSI CMOS Image Sensor Photocathode IIPX Lithography Process Flow: Principles, Physics, and Integration Logic
Role in the Complete Flow The Photocathode IIPX - Photo step defines the spatial boundaries of the N-type charge collection well, enabling precise control over the 3D potential…
7nm FinFET Thick Gate Oxide Growth Process Flow: Physical Mechanisms, Integration Logic, and Device Physics
Role in the Complete Flow In a 7nm FinFET integration flow, the growth of thick gate oxides occurs early in the gate module sequence, immediately following fin formation, shallow…
7nm FinFET Replacement Metal Gate Integration Process Flow: Principles, Mechanisms, and Integration Logic
Role in the Complete Flow The replacement metal gate (RMG) module in a 7nm FinFET process flow is the defining structural transformation that converts a temporary polysilicon…
FinFET Fin: Physical Principles, Patterning Mechanisms, and Advanced Node Evolution
The FinFET fin is the defining structural element of the non-planar transistor architecture that has powered semiconductor scaling from the 22 nm node onward.
NMOS Transistor: Operation and Formation
How does an NMOS transistor work, and how is it built? Separate the operating inversion channel from a real planar p-body, gate and source/drain sequence.
14nm FinFET: Device Physics, Process Integration, and Electrostatic Scaling Principles
The 14nm technology node represents a watershed moment in semiconductor manufacturing — the generation where the three-dimensional fin field effect transistor (FinFET) matured…
FinFET: Physics, Process Principles, and Technology Evolution in Advanced Semiconductor Manufacturing
The fin field-effect transistor (FinFET) is a non-planar, multi-gate metal-oxide-semiconductor field-effect transistor (MOSFET) architecture in which the conducting channel is…
Reset Transistor (RST): Physics, Process Integration, and Resistive Memory Control in Advanced Semiconductor Nodes
The reset transistor (RST) is a critical access element in modern non-volatile memory architectures—specifically in one-transistor-one-resistor (1T1R) resistive random-access…
Demystifying the Reset Transistor (RST): Physics, Process Integration, and Advanced Node Challenges
The reset transistor (RST) is a foundational element in modern integrated circuit design, playing a crucial role in optical sensing and non-volatile memory architectures.