Technical Blog
Deep dive into the physics and integration logic of semiconductor manufacturing
40nm BSI CMOS Image Sensor Pixel and Peripheral Contact Implant Integration: Process Flow Principles and Device Physics
Role in the Complete Flow The 40nm backside illumination (BSI) CMOS image sensor represents a generation of image sensor technology in which pixel arrays and peripheral logic…
40nm BSI CMOS Image Sensor Photocathode IIPX Lithography Process Flow: Principles, Physics, and Integration Logic
Role in the Complete Flow The Photocathode IIPX - Photo step defines the spatial boundaries of the N-type charge collection well, enabling precise control over the 3D potential…
40nm BSI CMOS Image Sensor Pre-Metal Dielectric Integration: Process Flow, Mechanisms, and Failure Propagation
Role in the Complete Flow The pre-metal dielectric (PMD) module in a 40nm BSI CMOS image sensor serves as the critical structural and electrical bridge between the completed…
40nm BSI CMOS Image Sensor Backside Substrate-Contact Integration Process Flow: Principles, Mechanisms, and Module Dependencies
Role in the Complete Flow In a 40nm backside-illuminated (BSI) complementary metal-oxide-semiconductor (CMOS) image sensor (CIS) fabrication sequence, the backside…
40nm BSI CMOS Image Sensor Shallow Trench Isolation Process Flow: Integration Logic, Mechanisms, and Engineering Tradeoffs
Role in the Complete Flow In a 40nm backside illumination (BSI) complementary metal-oxide semiconductor (CMOS) image sensor, the shallow trench isolation (STI) module serves as…
40nm BSI CMOS Image Sensor Sidewall Spacer Integration: Process Flow Principles and Device Physics
Role in the Complete Flow The sidewall spacer (SWS) module in a 40nm back-side illuminated (BSI) complementary metal-oxide-semiconductor (CMOS) image sensor occupies a pivotal…
40nm BSI CMOS Image Sensor Backside Wafer Thinning Process Flow: Integration Principles and Physical Mechanisms
Role in the Complete Flow The 40nm BSI CMOS Image Sensor represents a generation of imaging devices where the photodiode array and the readout circuitry occupy opposite faces of…
40nm BSI CMOS Image Sensor Upper Optical Clear-Layer and Microlens Integration: Process Flow Principles and Physics
Role in the Complete Flow The 40nm BSI CMOS Image Sensor upper optical clear-layer and microlens integration module sits at the very top of the backside optical stack, serving as…
40nm BSI CMOS Image Sensor Via-One Integration: Process Flow Principles and Device Physics
Role in the Complete Flow In the 40nm BSI CMOS Image Sensor process flow, the via-one (V1) integration module serves as the first inter-metal vertical interconnect opening layer…
40nm BSI CMOS Image Sensor Via-Two Integration: Process Flow Principles and Device Physics
Role in the Complete Flow The via-two (V2) module in a 40nm BSI CMOS Image Sensor serves as the critical inter-level bridging step between the second-level metal interconnect and…
40nm BSI CMOS Image Sensor Via 3 Lithography: Integration Principles and Device Physics
Role in the Complete Flow In the 40nm Backside Illumination (BSI) CMOS Image Sensor (CIS) backend-of-line (BEOL) fabrication flow, the Via 3 Lithography (VIA 3 - Photo) step…
40nm BSI CMOS Image Sensor Via-Four Integration Process Flow: Physical Mechanisms, Integration Logic, and Failure Propagation
Role in the Complete Flow The 40nm BSI CMOS Image Sensor via-four integration process flow occupies a critical position in the back-end-of-line (BEOL) interconnect sequence…