Technical Blog
Deep dive into the physics and integration logic of semiconductor manufacturing
14nm FinFET Metal-One Interconnect Integration: Process Flow, Physics, and Module Dependencies
Role in the Complete Flow The metal-one (M1) interconnect module in a 14nm FinFET technology serves as the critical bridge between the transistor-level contact
28nm Planar Copper Bump Integration Process Flow: Principles, Mechanisms, and Integration Logic
Role in the Complete Flow The 28nm Planar copper bump (CB) module occupies a critical junction between back-end-of-line (BEOL) interconnect completion and wafer
40nm BSI CMOS Image Sensor Contact Formation: Process Flow, Mechanisms, and Integration Logic
Role in the Complete Flow In the 40nm BSI CMOS Image Sensor process flow, the contact formation module serves as the critical bridge between front-end-of-line (
High-k Metal Gate (HKMG) Technology: Principles, Physics, and Advanced Node Integration
Introduction For more than four decades, the complementary metal-oxide-semiconductor (CMOS) industry relied on silicon dioxide (SiO₂) as the gate dielectric and
Pre-Metal Dielectric (PMD): Physics, Process Integration, and Evolution Across Advanced Semiconductor Nodes
Introduction In the architecture of a modern integrated circuit, the transition from front-end-of-line (FEOL) transistor fabrication to back-end-of-line (BEOL)
Self-Aligned Contact (SAC) in Semiconductor Manufacturing: Principles, Physics, and Integration Logic
Introduction As semiconductor technology nodes scale below 28 nm, the pitch between transistor gates shrinks faster than the improvement in lithographic overlay
Direct Bond Interconnect: Physics, Process Principles, and Integration in Advanced Semiconductor Packaging
Introduction Direct bond interconnect (DBI) is a planar, bumpless bonding technology that forms chip-to-chip or wafer-to-wafer electrical connections through si
Low Energy Contact (LEC) in Semiconductor Manufacturing: Physics, Process Principles, and Advanced Node Evolution
Introduction As CMOS technology scales deeper into the nanometer regime, the resistance associated with the interface between metal interconnects and semiconduc
Deep Dive into Local Via (V0) Integration: Principles, Physics, and Advanced Node Challenges
Introduction In modern integrated circuits, the density of transistors has scaled exponentially in accordance with Moore’s Law T2. As device footprints shrink,
Mastering the First Via Level: Process Integration, Physics, and Advanced Node Challenges in Semiconductor Manufacturing
Introduction In modern integrated circuit (IC) manufacturing, the vertical connection of dense components is as critical as the planar placement of transistors
Mastering the Dual Work Function Metal Gate: Principles, Integration, and Advanced Node Evolution
Introduction As semiconductor devices continue to scale to keep pace with Moore's law, conventional polycrystalline silicon gates have encountered critical phys
Low Energy Contact Engineering: Principles, Physics, and Advanced Node Integration
Introduction In modern very-large-scale integration (VLSI) manufacturing, contact resistance ($R_c$) at the metal-semiconductor interface represents one of the